#iommu-cells = <0>;
        };
 
+       vepu: video-codec@fdee0000 {
+               compatible = "rockchip,rk3568-vepu";
+               reg = <0x0 0xfdee0000 0x0 0x800>;
+               interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&cru ACLK_JENC>, <&cru HCLK_JENC>;
+               clock-names = "aclk", "hclk";
+               iommus = <&vepu_mmu>;
+               power-domains = <&power RK3568_PD_RGA>;
+       };
+
+       vepu_mmu: iommu@fdee0800 {
+               compatible = "rockchip,rk3568-iommu";
+               reg = <0x0 0xfdee0800 0x0 0x40>;
+               interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&cru ACLK_JENC>, <&cru HCLK_JENC>;
+               clock-names = "aclk", "iface";
+               power-domains = <&power RK3568_PD_RGA>;
+               #iommu-cells = <0>;
+       };
+
        sdmmc2: mmc@fe000000 {
                compatible = "rockchip,rk3568-dw-mshc", "rockchip,rk3288-dw-mshc";
                reg = <0x0 0xfe000000 0x0 0x4000>;