}
                        break;
                case AMDGPU_HW_IP_VCN_JPEG:
-                       for (j = 0; j < adev->vcn.num_vcn_inst; ++j) {
+                       for (j = 0; j < adev->jpeg.num_jpeg_inst; ++j) {
                                if (adev->vcn.harvest_config & (1 << j))
                                        continue;
-                               rings[num_rings++] = &adev->vcn.inst[j].ring_jpeg;
+                               rings[num_rings++] = &adev->jpeg.inst[j].ring_dec;
                        }
                        break;
                }
 
                break;
        case AMDGPU_HW_IP_VCN_JPEG:
                type = AMD_IP_BLOCK_TYPE_VCN;
-               for (i = 0; i < adev->vcn.num_vcn_inst; i++) {
-                       if (adev->uvd.harvest_config & (1 << i))
+               for (i = 0; i < adev->jpeg.num_jpeg_inst; i++) {
+                       if (adev->jpeg.harvest_config & (1 << i))
                                continue;
 
-                       if (adev->vcn.inst[i].ring_jpeg.sched.ready)
+                       if (adev->jpeg.inst[i].ring_dec.sched.ready)
                                ++num_rings;
                }
                ib_start_alignment = 16;
 
 
                for (i = 0; i < adev->vcn.num_enc_rings; ++i)
                        amdgpu_ring_fini(&adev->vcn.inst[j].ring_enc[i]);
-
-               amdgpu_ring_fini(&adev->vcn.inst[j].ring_jpeg);
        }
 
        release_firmware(adev->vcn.fw);
                        else
                                new_state.fw_based = VCN_DPG_STATE__UNPAUSE;
 
-                       if (amdgpu_fence_count_emitted(&adev->vcn.inst[j].ring_jpeg))
+                       if (amdgpu_fence_count_emitted(&adev->jpeg.inst[j].ring_dec))
                                new_state.jpeg = VCN_DPG_STATE__PAUSE;
                        else
                                new_state.jpeg = VCN_DPG_STATE__UNPAUSE;
                        adev->vcn.pause_dpg_mode(adev, &new_state);
                }
 
-               fence[j] += amdgpu_fence_count_emitted(&adev->vcn.inst[j].ring_jpeg);
+               fence[j] += amdgpu_fence_count_emitted(&adev->jpeg.inst[j].ring_dec);
                fence[j] += amdgpu_fence_count_emitted(&adev->vcn.inst[j].ring_dec);
                fences += fence[j];
        }
                else
                        new_state.fw_based = VCN_DPG_STATE__UNPAUSE;
 
-               if (amdgpu_fence_count_emitted(&adev->vcn.inst[ring->me].ring_jpeg))
+               if (amdgpu_fence_count_emitted(&adev->jpeg.inst[ring->me].ring_dec))
                        new_state.jpeg = VCN_DPG_STATE__PAUSE;
                else
                        new_state.jpeg = VCN_DPG_STATE__UNPAUSE;