]> www.infradead.org Git - users/hch/misc.git/commitdiff
drm/i915/cdclk: use generic poll_timeout_us() instead of wait_for()
authorJani Nikula <jani.nikula@intel.com>
Thu, 28 Aug 2025 12:20:50 +0000 (15:20 +0300)
committerJani Nikula <jani.nikula@intel.com>
Thu, 4 Sep 2025 11:02:58 +0000 (14:02 +0300)
Prefer generic poll helpers over i915 custom helpers.

The functional change is losing the exponentially growing sleep of
wait_for(), which used to be 10, 20, 40, ..., 640, and 1280 us.

Use an arbitrary constant 500 us sleep instead. The timeout remains at
50 ms.

Reviewed-by: Jouni Högander <jouni.hogander@intel.com>
Link: https://lore.kernel.org/r/6d50031411d5517508867d4b595ce90a2b44073b.1756383233.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
drivers/gpu/drm/i915/display/intel_cdclk.c

index d7ba3970e1e92912d243f6ffddd066a20c99febc..9725eebe5706a8a737d3b8d3f1de65f0e7455343 100644 (file)
@@ -22,6 +22,7 @@
  */
 
 #include <linux/debugfs.h>
+#include <linux/iopoll.h>
 #include <linux/time.h>
 
 #include <drm/drm_fixed.h>
@@ -673,6 +674,7 @@ static void vlv_set_cdclk(struct intel_display *display,
        int cdclk = cdclk_config->cdclk;
        u32 val, cmd = cdclk_config->voltage_level;
        intel_wakeref_t wakeref;
+       int ret;
 
        switch (cdclk) {
        case 400000:
@@ -703,12 +705,12 @@ static void vlv_set_cdclk(struct intel_display *display,
        val &= ~DSPFREQGUAR_MASK;
        val |= (cmd << DSPFREQGUAR_SHIFT);
        vlv_punit_write(display->drm, PUNIT_REG_DSPSSPM, val);
-       if (wait_for((vlv_punit_read(display->drm, PUNIT_REG_DSPSSPM) &
-                     DSPFREQSTAT_MASK) == (cmd << DSPFREQSTAT_SHIFT),
-                    50)) {
-               drm_err(display->drm,
-                       "timed out waiting for CDclk change\n");
-       }
+
+       ret = poll_timeout_us(val = vlv_punit_read(display->drm, PUNIT_REG_DSPSSPM),
+                             (val & DSPFREQSTAT_MASK) == (cmd << DSPFREQSTAT_SHIFT),
+                             500, 50 * 1000, false);
+       if (ret)
+               drm_err(display->drm, "timed out waiting for CDCLK change\n");
 
        if (cdclk == 400000) {
                u32 divider;
@@ -722,11 +724,11 @@ static void vlv_set_cdclk(struct intel_display *display,
                val |= divider;
                vlv_cck_write(display->drm, CCK_DISPLAY_CLOCK_CONTROL, val);
 
-               if (wait_for((vlv_cck_read(display->drm, CCK_DISPLAY_CLOCK_CONTROL) &
-                             CCK_FREQUENCY_STATUS) == (divider << CCK_FREQUENCY_STATUS_SHIFT),
-                            50))
-                       drm_err(display->drm,
-                               "timed out waiting for CDclk change\n");
+               ret = poll_timeout_us(val = vlv_cck_read(display->drm, CCK_DISPLAY_CLOCK_CONTROL),
+                                     (val & CCK_FREQUENCY_STATUS) == (divider << CCK_FREQUENCY_STATUS_SHIFT),
+                                     500, 50 * 1000, false);
+               if (ret)
+                       drm_err(display->drm, "timed out waiting for CDCLK change\n");
        }
 
        /* adjust self-refresh exit latency value */
@@ -762,6 +764,7 @@ static void chv_set_cdclk(struct intel_display *display,
        int cdclk = cdclk_config->cdclk;
        u32 val, cmd = cdclk_config->voltage_level;
        intel_wakeref_t wakeref;
+       int ret;
 
        switch (cdclk) {
        case 333333:
@@ -787,12 +790,12 @@ static void chv_set_cdclk(struct intel_display *display,
        val &= ~DSPFREQGUAR_MASK_CHV;
        val |= (cmd << DSPFREQGUAR_SHIFT_CHV);
        vlv_punit_write(display->drm, PUNIT_REG_DSPSSPM, val);
-       if (wait_for((vlv_punit_read(display->drm, PUNIT_REG_DSPSSPM) &
-                     DSPFREQSTAT_MASK_CHV) == (cmd << DSPFREQSTAT_SHIFT_CHV),
-                    50)) {
-               drm_err(display->drm,
-                       "timed out waiting for CDclk change\n");
-       }
+
+       ret = poll_timeout_us(val = vlv_punit_read(display->drm, PUNIT_REG_DSPSSPM),
+                             (val & DSPFREQSTAT_MASK_CHV) == (cmd << DSPFREQSTAT_SHIFT_CHV),
+                             500, 50 * 1000, false);
+       if (ret)
+               drm_err(display->drm, "timed out waiting for CDCLK change\n");
 
        vlv_punit_put(display->drm);