if (mac_reg & E1000_PHY_CTRL_D0A_LPLU)
                        oem_reg |= HV_OEM_BITS_LPLU;
+
+               /* Set Restart auto-neg to activate the bits */
+               if (!e1000_check_reset_block(hw))
+                       oem_reg |= HV_OEM_BITS_RESTART_AN;
        } else {
-               if (mac_reg & E1000_PHY_CTRL_NOND0A_GBE_DISABLE)
+               if (mac_reg & (E1000_PHY_CTRL_GBE_DISABLE |
+                              E1000_PHY_CTRL_NOND0A_GBE_DISABLE))
                        oem_reg |= HV_OEM_BITS_GBE_DIS;
 
-               if (mac_reg & E1000_PHY_CTRL_NOND0A_LPLU)
+               if (mac_reg & (E1000_PHY_CTRL_D0A_LPLU |
+                              E1000_PHY_CTRL_NOND0A_LPLU))
                        oem_reg |= HV_OEM_BITS_LPLU;
        }
-       /* Restart auto-neg to activate the bits */
-       if (!e1000_check_reset_block(hw))
-               oem_reg |= HV_OEM_BITS_RESTART_AN;
+
        ret_val = hw->phy.ops.write_reg_locked(hw, HV_OEM_BITS, oem_reg);
 
 out:
 
        if (hw->mac.type >= e1000_pchlan) {
                e1000_oem_bits_config_ich8lan(hw, false);
+               e1000_phy_hw_reset_ich8lan(hw);
                ret_val = hw->phy.ops.acquire(hw);
                if (ret_val)
                        return;