drm/amd/pm: Update feature list for smu_v13_0_12

Update feature list for smu_v13_0_12 to show vcn & smu deep
sleep feature enable status.

Signed-off-by: Asad Kamal <asad.kamal@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/pm/swsmu/inc/smu_types.h b/drivers/gpu/drm/amd/pm/swsmu/inc/smu_types.h
index 9c8468fb203a76cd52661de91378c38c9979ac5f..c9dee09395e3b841af7b08bb7c4cf9a2e40ec4a8 100644 (file)
--- a/drivers/gpu/drm/amd/pm/swsmu/inc/smu_types.h
+++ b/drivers/gpu/drm/amd/pm/swsmu/inc/smu_types.h
@@ -356,6 +356,7 @@ enum smu_clk_type {
        __SMU_DUMMY_MAP(DS_FCLK),                               \
        __SMU_DUMMY_MAP(DS_MP1CLK),                             \
        __SMU_DUMMY_MAP(DS_MP0CLK),                             \
+       __SMU_DUMMY_MAP(DS_MPIOCLK),                     \
        __SMU_DUMMY_MAP(XGMI_PER_LINK_PWR_DWN),          \
        __SMU_DUMMY_MAP(DPM_GFX_PACE),                          \
        __SMU_DUMMY_MAP(MEM_VDDCI_SCALING),                     \
@@ -452,7 +453,8 @@ enum smu_clk_type {
        __SMU_DUMMY_MAP(APT_PF_DCS),                            \
        __SMU_DUMMY_MAP(GFX_EDC_XVMIN),                         \
        __SMU_DUMMY_MAP(GFX_DIDT_XVMIN),                                \
-       __SMU_DUMMY_MAP(FAN_ABNORMAL),
+       __SMU_DUMMY_MAP(FAN_ABNORMAL),                          \
+       __SMU_DUMMY_MAP(PIT),
 
 #undef __SMU_DUMMY_MAP
 #define __SMU_DUMMY_MAP(feature)       SMU_FEATURE_##feature##_BIT

diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_12_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_12_ppt.c
index 285dbfe1030379891d505245434398fb16196397..51078accc0f8fdd294d3dfc8d79ad0dfa3f38c3f 100644 (file)
--- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_12_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_12_ppt.c
@@ -76,6 +76,11 @@ const struct cmn2asic_mapping smu_v13_0_12_feature_mask_map[SMU_FEATURE_COUNT] =
        SMU_13_0_12_FEA_MAP(SMU_FEATURE_THERMAL_BIT,                    FEATURE_THERMAL),
        SMU_13_0_12_FEA_MAP(SMU_FEATURE_SOC_PCC_BIT,                    FEATURE_SOC_PCC),
        SMU_13_0_12_FEA_MAP(SMU_FEATURE_XGMI_PER_LINK_PWR_DWN_BIT,      FEATURE_XGMI_PER_LINK_PWR_DOWN),
+       SMU_13_0_12_FEA_MAP(SMU_FEATURE_DS_VCN_BIT,                     FEATURE_DS_VCN),
+       SMU_13_0_12_FEA_MAP(SMU_FEATURE_DS_MP1CLK_BIT,                  FEATURE_DS_MP1CLK),
+       SMU_13_0_12_FEA_MAP(SMU_FEATURE_DS_MPIOCLK_BIT,                 FEATURE_DS_MPIOCLK),
+       SMU_13_0_12_FEA_MAP(SMU_FEATURE_DS_MP0CLK_BIT,                  FEATURE_DS_MP0CLK),
+       SMU_13_0_12_FEA_MAP(SMU_FEATURE_PIT_BIT,                        FEATURE_PIT),
 };
 
 // clang-format off