#define MIPS_CONF7_RPS         (_ULCAST_(1) << 2)
 
+#define MIPS_CONF7_IAR         (_ULCAST_(1) << 10)
+#define MIPS_CONF7_AR          (_ULCAST_(1) << 16)
+
 /*  EntryHI bit definition */
 #define MIPS_ENTRYHI_EHINV     (_ULCAST_(1) << 10)
 
 
        case CPU_PROAPTIV:
                if (current_cpu_type() == CPU_74K)
                        alias_74k_erratum(c);
-               if ((read_c0_config7() & (1 << 16))) {
-                       /* effectively physically indexed dcache,
-                          thus no virtual aliases. */
+               if (!(read_c0_config7() & MIPS_CONF7_IAR) &&
+                   (c->icache.waysize > PAGE_SIZE))
+                       c->icache.flags |= MIPS_CACHE_ALIASES;
+               if (read_c0_config7() & MIPS_CONF7_AR) {
+                       /*
+                        * Effectively physically indexed dcache,
+                        * thus no virtual aliases.
+                       */
                        c->dcache.flags |= MIPS_CACHE_PINDEX;
                        break;
                }