#include "amdgpu.h"
 #include "amdgpu_xgmi.h"
 #include "amdgpu_smu.h"
+#include "amdgpu_ras.h"
 #include "df/df_3_6_offset.h"
 
 static DEFINE_MUTEX(xgmi_mutex);
                mutex_unlock(&hive->hive_lock);
        }
 }
+
+int amdgpu_xgmi_ras_late_init(struct amdgpu_device *adev)
+{
+       int r;
+       struct ras_ih_if ih_info = {
+               .cb = NULL,
+       };
+       struct ras_fs_if fs_info = {
+               .sysfs_name = "xgmi_wafl_err_count",
+               .debugfs_name = "xgmi_wafl_err_inject",
+       };
+
+       if (!adev->gmc.xgmi.supported ||
+           adev->gmc.xgmi.num_physical_nodes == 0)
+               return 0;
+
+       if (!adev->gmc.xgmi.ras_if) {
+               adev->gmc.xgmi.ras_if = kmalloc(sizeof(struct ras_common_if), GFP_KERNEL);
+               if (!adev->gmc.xgmi.ras_if)
+                       return -ENOMEM;
+               adev->gmc.xgmi.ras_if->block = AMDGPU_RAS_BLOCK__XGMI_WAFL;
+               adev->gmc.xgmi.ras_if->type = AMDGPU_RAS_ERROR__MULTI_UNCORRECTABLE;
+               adev->gmc.xgmi.ras_if->sub_block_index = 0;
+               strcpy(adev->gmc.xgmi.ras_if->name, "xgmi_wafl");
+       }
+       ih_info.head = fs_info.head = *adev->gmc.xgmi.ras_if;
+       r = amdgpu_ras_late_init(adev, adev->gmc.xgmi.ras_if,
+                                &fs_info, &ih_info);
+       if (r || !amdgpu_ras_is_supported(adev, adev->gmc.xgmi.ras_if->block)) {
+               kfree(adev->gmc.xgmi.ras_if);
+               adev->gmc.xgmi.ras_if = NULL;
+       }
+
+       return r;
+}
 
 int amdgpu_xgmi_set_pstate(struct amdgpu_device *adev, int pstate);
 int amdgpu_xgmi_get_hops_count(struct amdgpu_device *adev,
                struct amdgpu_device *peer_adev);
+int amdgpu_xgmi_ras_late_init(struct amdgpu_device *adev);
 
 static inline bool amdgpu_xgmi_same_hive(struct amdgpu_device *adev,
                struct amdgpu_device *bo_adev)
 
 #include "ivsrcid/vmc/irqsrcs_vmc_1_0.h"
 
 #include "amdgpu_ras.h"
+#include "amdgpu_xgmi.h"
 
 /* add these here since we already include dce12 headers and these are for DCN */
 #define mmHUBP0_DCSURF_PRI_VIEWPORT_DIMENSION                                                          0x055d
                if (r)
                        return r;
        }
-       return 0;
+
+       return amdgpu_xgmi_ras_late_init(adev);
 }
 
 static int gmc_v9_0_late_init(void *handle)