CSR_GP_DRIVER_REG_BIT_CALIB_VERSION6);
 }
 
+static void iwl6050g2_additional_nic_config(struct iwl_priv *priv)
+{
+       /* Indicate calibration version to uCode. */
+       if (priv->cfg->ops->lib->eeprom_ops.calib_version(priv) >= 6)
+               iwl_set_bit(priv, CSR_GP_DRIVER_REG,
+                               CSR_GP_DRIVER_REG_BIT_CALIB_VERSION6);
+       iwl_set_bit(priv, CSR_GP_DRIVER_REG,
+                   CSR_GP_DRIVER_REG_BIT_6050_1x2);
+}
+
 /* NIC configuration for 6000 series */
 static void iwl6000_nic_config(struct iwl_priv *priv)
 {
        .additional_nic_config = &iwl6050_additional_nic_config,
 };
 
+static struct iwl_nic_ops iwl6050g2_nic_ops = {
+       .additional_nic_config = &iwl6050g2_additional_nic_config,
+};
+
 static const struct iwl_ops iwl6000_ops = {
        .lib = &iwl6000_lib,
        .hcmd = &iwlagn_hcmd,
        .nic = &iwl6050_nic_ops,
 };
 
+static const struct iwl_ops iwl6050g2_ops = {
+       .lib = &iwl6000_lib,
+       .hcmd = &iwlagn_hcmd,
+       .utils = &iwlagn_hcmd_utils,
+       .led = &iwlagn_led_ops,
+       .nic = &iwl6050g2_nic_ops,
+};
+
 static const struct iwl_ops iwl6000g2b_ops = {
        .lib = &iwl6000g2b_lib,
        .hcmd = &iwlagn_bt_hcmd,
        .ucode_api_max = IWL6050_UCODE_API_MAX,
        .ucode_api_min = IWL6050_UCODE_API_MIN,
        .sku = IWL_SKU_G|IWL_SKU_N,
-       .ops = &iwl6050_ops,
+       .ops = &iwl6050g2_ops,
        .eeprom_size = OTP_LOW_IMAGE_SIZE,
        .eeprom_ver = EEPROM_6050G2_EEPROM_VERSION,
        .eeprom_calib_ver = EEPROM_6050G2_TX_POWER_VERSION,
 
 #define CSR_GP_DRIVER_REG_BIT_RADIO_SKU_3x3_HYB            (0x00000000)
 #define CSR_GP_DRIVER_REG_BIT_RADIO_SKU_2x2_HYB            (0x00000001)
 #define CSR_GP_DRIVER_REG_BIT_RADIO_SKU_2x2_IPA            (0x00000002)
-#define CSR_GP_DRIVER_REG_BIT_CALIB_VERSION6   (0x00000004)
+#define CSR_GP_DRIVER_REG_BIT_CALIB_VERSION6       (0x00000004)
+#define CSR_GP_DRIVER_REG_BIT_6050_1x2             (0x00000008)
 
 /* GIO Chicken Bits (PCI Express bus link power management) */
 #define CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX  (0x00800000)