drm/amdgpu: add ih ip block for navy_flounder

navy_flounder has the same osssys IP verison with
sienna_cichlid, follow its setting.

Signed-off-by: Jiansong Chen <Jiansong.Chen@amd.com>
Reviewed-by: Tao Zhou <Tao.Zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/navi10_ih.c b/drivers/gpu/drm/amd/amdgpu/navi10_ih.c
index 471dc82fd1aafc5693dfd5ca8d9a15fe7a739d93..fdabaf0db3e67e354fe2c0aead298772048f511b 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/navi10_ih.c
+++ b/drivers/gpu/drm/amd/amdgpu/navi10_ih.c
@@ -270,6 +270,7 @@ static int navi10_ih_irq_init(struct amdgpu_device *adev)
                if (ih->use_bus_addr) {
                        switch (adev->asic_type) {
                        case CHIP_SIENNA_CICHLID:
+                       case CHIP_NAVY_FLOUNDER:
                                ih_chicken = RREG32_SOC15(OSSSYS, 0, mmIH_CHICKEN_Sienna_Cichlid);
                                ih_chicken = REG_SET_FIELD(ih_chicken,
                                                IH_CHICKEN, MC_SPACE_GPA_ENABLE, 1);

diff --git a/drivers/gpu/drm/amd/amdgpu/nv.c b/drivers/gpu/drm/amd/amdgpu/nv.c
index 07f9d61d1c36f42444029fc841a98b3515b532d6..d7688b9c339e3de90bca49eb2cc5317400e7fc12 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/nv.c
+++ b/drivers/gpu/drm/amd/amdgpu/nv.c
@@ -526,6 +526,7 @@ int nv_set_ip_blocks(struct amdgpu_device *adev)
        case CHIP_NAVY_FLOUNDER:
                amdgpu_device_ip_block_add(adev, &nv_common_ip_block);
                amdgpu_device_ip_block_add(adev, &gmc_v10_0_ip_block);
+               amdgpu_device_ip_block_add(adev, &navi10_ih_ip_block);
                break;
        default:
                return -EINVAL;