plane->id = PLANE_PRIMARY;
        plane->frontbuffer_bit = INTEL_FRONTBUFFER(pipe, plane->id);
 
-       plane->has_fbc = i9xx_plane_has_fbc(dev_priv, plane->i9xx_plane);
-       if (plane->has_fbc) {
-               struct intel_fbc *fbc = &dev_priv->fbc;
-
-               fbc->possible_framebuffer_bits |= plane->frontbuffer_bit;
-       }
+       if (i9xx_plane_has_fbc(dev_priv, plane->i9xx_plane))
+               plane->fbc = &dev_priv->fbc;
+       if (plane->fbc)
+               plane->fbc->possible_framebuffer_bits |= plane->frontbuffer_bit;
 
        if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
                formats = vlv_primary_formats;
 
        const struct intel_plane_state *plane_state =
                intel_atomic_get_new_plane_state(state, plane);
        struct drm_i915_private *i915 = to_i915(crtc->base.dev);
-       struct intel_fbc *fbc = &i915->fbc;
+       struct intel_fbc *fbc = plane->fbc;
        const char *reason = "update pending";
        bool need_vblank_wait = false;
 
-       if (!plane->has_fbc || !plane_state)
+       if (!fbc || !plane_state)
                return need_vblank_wait;
 
        mutex_lock(&fbc->lock);
 void intel_fbc_post_update(struct intel_atomic_state *state,
                           struct intel_crtc *crtc)
 {
-       struct drm_i915_private *i915 = to_i915(crtc->base.dev);
        struct intel_plane *plane = to_intel_plane(crtc->base.primary);
        const struct intel_plane_state *plane_state =
                intel_atomic_get_new_plane_state(state, plane);
-       struct intel_fbc *fbc = &i915->fbc;
+       struct intel_fbc *fbc = plane->fbc;
 
-       if (!plane->has_fbc || !plane_state)
+       if (!fbc || !plane_state)
                return;
 
        mutex_lock(&fbc->lock);
                struct intel_crtc_state *crtc_state;
                struct intel_crtc *crtc = to_intel_crtc(plane_state->hw.crtc);
 
-               if (!plane->has_fbc)
+               if (plane->fbc != fbc)
                        continue;
 
                if (!plane_state->uapi.visible)
                intel_atomic_get_new_crtc_state(state, crtc);
        const struct intel_plane_state *plane_state =
                intel_atomic_get_new_plane_state(state, plane);
-       struct intel_fbc *fbc = &i915->fbc;
-       struct intel_fbc_state_cache *cache = &fbc->state_cache;
+       struct intel_fbc *fbc = plane->fbc;
+       struct intel_fbc_state_cache *cache;
        int min_limit;
 
-       if (!plane->has_fbc || !plane_state)
+       if (!fbc || !plane_state)
                return;
 
+       cache = &fbc->state_cache;
+
        min_limit = intel_fbc_min_limit(plane_state->hw.fb ?
                                        plane_state->hw.fb->format->cpp[0] : 0);
 
  */
 void intel_fbc_disable(struct intel_crtc *crtc)
 {
-       struct drm_i915_private *i915 = to_i915(crtc->base.dev);
        struct intel_plane *plane = to_intel_plane(crtc->base.primary);
-       struct intel_fbc *fbc = &i915->fbc;
+       struct intel_fbc *fbc = plane->fbc;
 
-       if (!plane->has_fbc)
+       if (!fbc)
                return;
 
        mutex_lock(&fbc->lock);
 
        plane->id = plane_id;
        plane->frontbuffer_bit = INTEL_FRONTBUFFER(pipe, plane_id);
 
-       plane->has_fbc = skl_plane_has_fbc(dev_priv, pipe, plane_id);
-       if (plane->has_fbc) {
-               struct intel_fbc *fbc = &dev_priv->fbc;
-
-               fbc->possible_framebuffer_bits |= plane->frontbuffer_bit;
-       }
+       if (skl_plane_has_fbc(dev_priv, pipe, plane_id))
+               plane->fbc = &dev_priv->fbc;
+       if (plane->fbc)
+               plane->fbc->possible_framebuffer_bits |= plane->frontbuffer_bit;
 
        if (DISPLAY_VER(dev_priv) >= 11) {
                plane->min_width = icl_plane_min_width;