]> www.infradead.org Git - users/jedix/linux-maple.git/commitdiff
drm/amd/virt: For SRIOV send GPU reset directly to TDR queue.
authorAndrey Grodzovsky <andrey.grodzovsky@amd.com>
Mon, 20 Dec 2021 22:27:37 +0000 (17:27 -0500)
committerAndrey Grodzovsky <andrey.grodzovsky@amd.com>
Wed, 9 Feb 2022 17:16:06 +0000 (12:16 -0500)
No need to to trigger another work queue inside the work queue.

v3:

Problem:
Extra reset caused by host side FLR notification
following guest side triggered reset.
Fix: Preven qeuing flr_work from mailbox irq if guest
already executing a reset.

Suggested-by: Liu Shaoyun <Shaoyun.Liu@amd.com>
Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Reviewed-by: Liu Shaoyun <Shaoyun.Liu@amd.com>
Link: https://www.spinics.net/lists/amd-gfx/msg74114.html
drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c
drivers/gpu/drm/amd/amdgpu/mxgpu_nv.c
drivers/gpu/drm/amd/amdgpu/mxgpu_vi.c

index 56da5ab829871dbc0d4afb411225d8a9f2dada73..5869d51d8beecf5dd24eb55b3b31cd90bcf831aa 100644 (file)
@@ -282,7 +282,7 @@ flr_done:
        if (amdgpu_device_should_recover_gpu(adev)
                && (!amdgpu_device_has_job_running(adev) ||
                adev->sdma_timeout == MAX_SCHEDULE_TIMEOUT))
-               amdgpu_device_gpu_recover(adev, NULL);
+               amdgpu_device_gpu_recover_imp(adev, NULL);
 }
 
 static int xgpu_ai_set_mailbox_rcv_irq(struct amdgpu_device *adev,
@@ -307,8 +307,11 @@ static int xgpu_ai_mailbox_rcv_irq(struct amdgpu_device *adev,
 
        switch (event) {
                case IDH_FLR_NOTIFICATION:
-               if (amdgpu_sriov_runtime(adev))
-                       schedule_work(&adev->virt.flr_work);
+               if (amdgpu_sriov_runtime(adev) && !amdgpu_in_reset(adev))
+                       WARN_ONCE(!queue_work(adev->reset_domain.wq,
+                                             &adev->virt.flr_work),
+                                 "Failed to queue work! at %s",
+                                 __func__);
                break;
                case IDH_QUERY_ALIVE:
                        xgpu_ai_mailbox_send_ack(adev);
index 477d0dde19c52f985009d163cda054c45d8e2904..5728a6401d73fd44f2f207c4b6e68bae0fe08d56 100644 (file)
@@ -309,7 +309,7 @@ flr_done:
                adev->gfx_timeout == MAX_SCHEDULE_TIMEOUT ||
                adev->compute_timeout == MAX_SCHEDULE_TIMEOUT ||
                adev->video_timeout == MAX_SCHEDULE_TIMEOUT))
-               amdgpu_device_gpu_recover(adev, NULL);
+               amdgpu_device_gpu_recover_imp(adev, NULL);
 }
 
 static int xgpu_nv_set_mailbox_rcv_irq(struct amdgpu_device *adev,
@@ -337,8 +337,11 @@ static int xgpu_nv_mailbox_rcv_irq(struct amdgpu_device *adev,
 
        switch (event) {
        case IDH_FLR_NOTIFICATION:
-               if (amdgpu_sriov_runtime(adev))
-                       schedule_work(&adev->virt.flr_work);
+               if (amdgpu_sriov_runtime(adev) && !amdgpu_in_reset(adev))
+                       WARN_ONCE(!queue_work(adev->reset_domain.wq,
+                                             &adev->virt.flr_work),
+                                 "Failed to queue work! at %s",
+                                 __func__);
                break;
                /* READY_TO_ACCESS_GPU is fetched by kernel polling, IRQ can ignore
                 * it byfar since that polling thread will handle it,
index aef9d059ae52585bc84973c01060b319cf29d84a..02290febfcf4f65294ac1370a73cd5597931f05a 100644 (file)
@@ -521,7 +521,7 @@ static void xgpu_vi_mailbox_flr_work(struct work_struct *work)
 
        /* Trigger recovery due to world switch failure */
        if (amdgpu_device_should_recover_gpu(adev))
-               amdgpu_device_gpu_recover(adev, NULL);
+               amdgpu_device_gpu_recover_imp(adev, NULL);
 }
 
 static int xgpu_vi_set_mailbox_rcv_irq(struct amdgpu_device *adev,
@@ -550,8 +550,11 @@ static int xgpu_vi_mailbox_rcv_irq(struct amdgpu_device *adev,
                r = xgpu_vi_mailbox_rcv_msg(adev, IDH_FLR_NOTIFICATION);
 
                /* only handle FLR_NOTIFY now */
-               if (!r)
-                       schedule_work(&adev->virt.flr_work);
+               if (!r && !amdgpu_in_reset(adev))
+                       WARN_ONCE(!queue_work(adev->reset_domain.wq,
+                                             &adev->virt.flr_work),
+                                 "Failed to queue work! at %s",
+                                 __func__);
        }
 
        return 0;