drm/i915: start moving runtime device info to a separate struct

First move the low hanging fruit, the fields that are only initialized
runtime. Use RUNTIME_INFO() exclusively to access the fields.

Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/c24fe7a4b0492a888690c46814c0ff21ce2f12b1.1546267488.git.jani.nikula@intel.com

diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index b89abbba4604e4b54dca97385e6fe7123c71983e..193823048f96f87a077ac961ef1c293d59cd2dd9 100644 (file)
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -48,7 +48,7 @@ static int i915_capabilities(struct seq_file *m, void *data)
        seq_printf(m, "pch: %d\n", INTEL_PCH_TYPE(dev_priv));
 
        intel_device_info_dump_flags(info, &p);
-       intel_device_info_dump_runtime(info, &p);
+       intel_device_info_dump_runtime(RUNTIME_INFO(dev_priv), &p);
        intel_driver_caps_print(&dev_priv->caps, &p);
 
        kernel_param_lock(THIS_MODULE);
@@ -3157,7 +3157,7 @@ static int i915_engine_info(struct seq_file *m, void *unused)
        seq_printf(m, "Global active requests: %d\n",
                   dev_priv->gt.active_requests);
        seq_printf(m, "CS timestamp frequency: %u kHz\n",
-                  dev_priv->info.cs_timestamp_frequency_khz);
+                  RUNTIME_INFO(dev_priv)->cs_timestamp_frequency_khz);
 
        p = drm_seq_file_printer(m);
        for_each_engine(engine, dev_priv, id)
@@ -3173,7 +3173,7 @@ static int i915_rcs_topology(struct seq_file *m, void *unused)
        struct drm_i915_private *dev_priv = node_to_i915(m->private);
        struct drm_printer p = drm_seq_file_printer(m);
 
-       intel_device_info_dump_topology(&INTEL_INFO(dev_priv)->sseu, &p);
+       intel_device_info_dump_topology(&RUNTIME_INFO(dev_priv)->sseu, &p);
 
        return 0;
 }
@@ -4209,7 +4209,7 @@ static void gen10_sseu_device_status(struct drm_i915_private *dev_priv,
                                     struct sseu_dev_info *sseu)
 {
 #define SS_MAX 6
-       const struct intel_device_info *info = INTEL_INFO(dev_priv);
+       const struct intel_runtime_info *info = RUNTIME_INFO(dev_priv);
        u32 s_reg[SS_MAX], eu_reg[2 * SS_MAX], eu_mask[2];
        int s, ss;
 
@@ -4265,7 +4265,7 @@ static void gen9_sseu_device_status(struct drm_i915_private *dev_priv,
                                    struct sseu_dev_info *sseu)
 {
 #define SS_MAX 3
-       const struct intel_device_info *info = INTEL_INFO(dev_priv);
+       const struct intel_runtime_info *info = RUNTIME_INFO(dev_priv);
        u32 s_reg[SS_MAX], eu_reg[2 * SS_MAX], eu_mask[2];
        int s, ss;
 
@@ -4293,7 +4293,7 @@ static void gen9_sseu_device_status(struct drm_i915_private *dev_priv,
 
                if (IS_GEN9_BC(dev_priv))
                        sseu->subslice_mask[s] =
-                               INTEL_INFO(dev_priv)->sseu.subslice_mask[s];
+                               RUNTIME_INFO(dev_priv)->sseu.subslice_mask[s];
 
                for (ss = 0; ss < info->sseu.max_subslices; ss++) {
                        unsigned int eu_cnt;
@@ -4327,10 +4327,10 @@ static void broadwell_sseu_device_status(struct drm_i915_private *dev_priv,
 
        if (sseu->slice_mask) {
                sseu->eu_per_subslice =
-                               INTEL_INFO(dev_priv)->sseu.eu_per_subslice;
+                       RUNTIME_INFO(dev_priv)->sseu.eu_per_subslice;
                for (s = 0; s < fls(sseu->slice_mask); s++) {
                        sseu->subslice_mask[s] =
-                               INTEL_INFO(dev_priv)->sseu.subslice_mask[s];
+                               RUNTIME_INFO(dev_priv)->sseu.subslice_mask[s];
                }
                sseu->eu_total = sseu->eu_per_subslice *
                                 sseu_subslice_total(sseu);
@@ -4338,7 +4338,7 @@ static void broadwell_sseu_device_status(struct drm_i915_private *dev_priv,
                /* subtract fused off EU(s) from enabled slice(s) */
                for (s = 0; s < fls(sseu->slice_mask); s++) {
                        u8 subslice_7eu =
-                               INTEL_INFO(dev_priv)->sseu.subslice_7eu[s];
+                               RUNTIME_INFO(dev_priv)->sseu.subslice_7eu[s];
 
                        sseu->eu_total -= hweight8(subslice_7eu);
                }
@@ -4391,14 +4391,14 @@ static int i915_sseu_status(struct seq_file *m, void *unused)
                return -ENODEV;
 
        seq_puts(m, "SSEU Device Info\n");
-       i915_print_sseu_info(m, true, &INTEL_INFO(dev_priv)->sseu);
+       i915_print_sseu_info(m, true, &RUNTIME_INFO(dev_priv)->sseu);
 
        seq_puts(m, "SSEU Device Status\n");
        memset(&sseu, 0, sizeof(sseu));
-       sseu.max_slices = INTEL_INFO(dev_priv)->sseu.max_slices;
-       sseu.max_subslices = INTEL_INFO(dev_priv)->sseu.max_subslices;
+       sseu.max_slices = RUNTIME_INFO(dev_priv)->sseu.max_slices;
+       sseu.max_subslices = RUNTIME_INFO(dev_priv)->sseu.max_subslices;
        sseu.max_eus_per_subslice =
-               INTEL_INFO(dev_priv)->sseu.max_eus_per_subslice;
+               RUNTIME_INFO(dev_priv)->sseu.max_eus_per_subslice;
 
        intel_runtime_pm_get(dev_priv);
 

diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index dcb935338c6305a59440dc8037634a366287d8f5..f884b9a138cd8f074d5004086326418621cb09f8 100644 (file)
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -358,12 +358,12 @@ static int i915_getparam_ioctl(struct drm_device *dev, void *data,
                value = i915_cmd_parser_get_version(dev_priv);
                break;
        case I915_PARAM_SUBSLICE_TOTAL:
-               value = sseu_subslice_total(&INTEL_INFO(dev_priv)->sseu);
+               value = sseu_subslice_total(&RUNTIME_INFO(dev_priv)->sseu);
                if (!value)
                        return -ENODEV;
                break;
        case I915_PARAM_EU_TOTAL:
-               value = INTEL_INFO(dev_priv)->sseu.eu_total;
+               value = RUNTIME_INFO(dev_priv)->sseu.eu_total;
                if (!value)
                        return -ENODEV;
                break;
@@ -380,7 +380,7 @@ static int i915_getparam_ioctl(struct drm_device *dev, void *data,
                value = HAS_POOLED_EU(dev_priv);
                break;
        case I915_PARAM_MIN_EU_IN_POOL:
-               value = INTEL_INFO(dev_priv)->sseu.min_eu_in_pool;
+               value = RUNTIME_INFO(dev_priv)->sseu.min_eu_in_pool;
                break;
        case I915_PARAM_HUC_STATUS:
                value = intel_huc_check_status(&dev_priv->huc);
@@ -430,17 +430,17 @@ static int i915_getparam_ioctl(struct drm_device *dev, void *data,
                value = intel_engines_has_context_isolation(dev_priv);
                break;
        case I915_PARAM_SLICE_MASK:
-               value = INTEL_INFO(dev_priv)->sseu.slice_mask;
+               value = RUNTIME_INFO(dev_priv)->sseu.slice_mask;
                if (!value)
                        return -ENODEV;
                break;
        case I915_PARAM_SUBSLICE_MASK:
-               value = INTEL_INFO(dev_priv)->sseu.subslice_mask[0];
+               value = RUNTIME_INFO(dev_priv)->sseu.subslice_mask[0];
                if (!value)
                        return -ENODEV;
                break;
        case I915_PARAM_CS_TIMESTAMP_FREQUENCY:
-               value = 1000 * INTEL_INFO(dev_priv)->cs_timestamp_frequency_khz;
+               value = 1000 * RUNTIME_INFO(dev_priv)->cs_timestamp_frequency_khz;
                break;
        case I915_PARAM_MMAP_GTT_COHERENT:
                value = INTEL_INFO(dev_priv)->has_coherent_ggtt;
@@ -1637,7 +1637,7 @@ static void i915_welcome_messages(struct drm_i915_private *dev_priv)
                struct drm_printer p = drm_debug_printer("i915 device info:");
 
                intel_device_info_dump(&dev_priv->info, &p);
-               intel_device_info_dump_runtime(&dev_priv->info, &p);
+               intel_device_info_dump_runtime(RUNTIME_INFO(dev_priv), &p);
        }
 
        if (IS_ENABLED(CONFIG_DRM_I915_DEBUG))
@@ -1674,7 +1674,7 @@ i915_driver_create(struct pci_dev *pdev, const struct pci_device_id *ent)
        /* Setup the write-once "constant" device info */
        device_info = mkwrite_device_info(i915);
        memcpy(device_info, match_info, sizeof(*device_info));
-       device_info->device_id = pdev->device;
+       RUNTIME_INFO(i915)->device_id = pdev->device;
 
        BUILD_BUG_ON(INTEL_MAX_PLATFORMS >
                     BITS_PER_TYPE(device_info->platform_mask));

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 13116909fe0deca7beb6931ec52978f387af99ba..805571a6a73901ff88527b4f575bb631fe60df4e 100644 (file)
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1432,6 +1432,7 @@ struct drm_i915_private {
        struct kmem_cache *priorities;
 
        const struct intel_device_info info;
+       struct intel_runtime_info __runtime; /* Use RUNTIME_INFO() to access. */
        struct intel_driver_caps caps;
 
        /**
@@ -2198,10 +2199,11 @@ intel_info(const struct drm_i915_private *dev_priv)
 }
 
 #define INTEL_INFO(dev_priv)   intel_info((dev_priv))
+#define RUNTIME_INFO(dev_priv) (&(dev_priv)->__runtime)
 #define DRIVER_CAPS(dev_priv)  (&(dev_priv)->caps)
 
 #define INTEL_GEN(dev_priv)    ((dev_priv)->info.gen)
-#define INTEL_DEVID(dev_priv)  ((dev_priv)->info.device_id)
+#define INTEL_DEVID(dev_priv)  (RUNTIME_INFO(dev_priv)->device_id)
 
 #define REVID_FOREVER          0xff
 #define INTEL_REVID(dev_priv)  ((dev_priv)->drm.pdev->revision)

diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c b/drivers/gpu/drm/i915/i915_gpu_error.c
index 2bd7991ec9afc8ac4723e90643020917c419f0fd..6238a06b6d4ef1fb91c7f15e4dae7a4cfedf4974 100644 (file)
--- a/drivers/gpu/drm/i915/i915_gpu_error.c
+++ b/drivers/gpu/drm/i915/i915_gpu_error.c
@@ -594,13 +594,14 @@ static void print_error_obj(struct drm_i915_error_state_buf *m,
 
 static void err_print_capabilities(struct drm_i915_error_state_buf *m,
                                   const struct intel_device_info *info,
+                                  const struct intel_runtime_info *runtime,
                                   const struct intel_driver_caps *caps)
 {
        struct drm_printer p = i915_error_printer(m);
 
        intel_device_info_dump_flags(info, &p);
        intel_driver_caps_print(caps, &p);
-       intel_device_info_dump_topology(&info->sseu, &p);
+       intel_device_info_dump_topology(&runtime->sseu, &p);
 }
 
 static void err_print_params(struct drm_i915_error_state_buf *m,
@@ -844,7 +845,8 @@ static void __err_print_to_sgl(struct drm_i915_error_state_buf *m,
        if (error->display)
                intel_display_print_error_state(m, error->display);
 
-       err_print_capabilities(m, &error->device_info, &error->driver_caps);
+       err_print_capabilities(m, &error->device_info, &error->runtime_info,
+                              &error->driver_caps);
        err_print_params(m, &error->params);
        err_print_uc(m, &error->uc);
 }
@@ -1824,6 +1826,9 @@ static void capture_gen_state(struct i915_gpu_state *error)
        memcpy(&error->device_info,
               INTEL_INFO(i915),
               sizeof(error->device_info));
+       memcpy(&error->runtime_info,
+              RUNTIME_INFO(i915),
+              sizeof(error->runtime_info));
        error->driver_caps = i915->caps;
 }
 

diff --git a/drivers/gpu/drm/i915/i915_gpu_error.h b/drivers/gpu/drm/i915/i915_gpu_error.h
index ff2652bbb0b08bb22cab8d32f338c1bdf8643e81..6d9f45468ac180728e7e7ce68f71847d117cd6a8 100644 (file)
--- a/drivers/gpu/drm/i915/i915_gpu_error.h
+++ b/drivers/gpu/drm/i915/i915_gpu_error.h
@@ -45,6 +45,7 @@ struct i915_gpu_state {
        u32 reset_count;
        u32 suspend_count;
        struct intel_device_info device_info;
+       struct intel_runtime_info runtime_info;
        struct intel_driver_caps driver_caps;
        struct i915_params params;
 

diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c
index 4288c0e02f0ccc549a16c702d82afbbcda47756c..289b90065d27469733e844285ddd7bb88847d35d 100644 (file)
--- a/drivers/gpu/drm/i915/i915_perf.c
+++ b/drivers/gpu/drm/i915/i915_perf.c
@@ -2646,7 +2646,7 @@ err:
 static u64 oa_exponent_to_ns(struct drm_i915_private *dev_priv, int exponent)
 {
        return div64_u64(1000000000ULL * (2ULL << exponent),
-                        1000ULL * INTEL_INFO(dev_priv)->cs_timestamp_frequency_khz);
+                        1000ULL * RUNTIME_INFO(dev_priv)->cs_timestamp_frequency_khz);
 }
 
 /**
@@ -3471,7 +3471,7 @@ void i915_perf_init(struct drm_i915_private *dev_priv)
                spin_lock_init(&dev_priv->perf.oa.oa_buffer.ptr_lock);
 
                oa_sample_rate_hard_limit = 1000 *
-                       (INTEL_INFO(dev_priv)->cs_timestamp_frequency_khz / 2);
+                       (RUNTIME_INFO(dev_priv)->cs_timestamp_frequency_khz / 2);
                dev_priv->perf.sysctl_header = register_sysctl_table(dev_root);
 
                mutex_init(&dev_priv->perf.metrics_lock);

diff --git a/drivers/gpu/drm/i915/i915_query.c b/drivers/gpu/drm/i915/i915_query.c
index 6fc4b8eeab428f7b10bf56ba5c07eba5789b59a7..95a343934cbd7a6d152d71a1e60f7fd523e0c70a 100644 (file)
--- a/drivers/gpu/drm/i915/i915_query.c
+++ b/drivers/gpu/drm/i915/i915_query.c
@@ -13,7 +13,7 @@
 static int query_topology_info(struct drm_i915_private *dev_priv,
                               struct drm_i915_query_item *query_item)
 {
-       const struct sseu_dev_info *sseu = &INTEL_INFO(dev_priv)->sseu;
+       const struct sseu_dev_info *sseu = &RUNTIME_INFO(dev_priv)->sseu;
        struct drm_i915_query_topology_info topo;
        u32 slice_length, subslice_length, eu_length, total_length;
 

diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c
index a1dfb00aa16d1cce75fb1db2e6b7631c08a3bd5e..ffc5d75aa690b52b954d01428442b87d5a37703d 100644 (file)
--- a/drivers/gpu/drm/i915/intel_device_info.c
+++ b/drivers/gpu/drm/i915/intel_device_info.c
@@ -104,7 +104,7 @@ static void sseu_dump(const struct sseu_dev_info *sseu, struct drm_printer *p)
        drm_printf(p, "has EU power gating: %s\n", yesno(sseu->has_eu_pg));
 }
 
-void intel_device_info_dump_runtime(const struct intel_device_info *info,
+void intel_device_info_dump_runtime(const struct intel_runtime_info *info,
                                    struct drm_printer *p)
 {
        sseu_dump(&info->sseu, p);
@@ -164,7 +164,7 @@ static u16 compute_eu_total(const struct sseu_dev_info *sseu)
 
 static void gen11_sseu_info_init(struct drm_i915_private *dev_priv)
 {
-       struct sseu_dev_info *sseu = &mkwrite_device_info(dev_priv)->sseu;
+       struct sseu_dev_info *sseu = &RUNTIME_INFO(dev_priv)->sseu;
        u8 s_en;
        u32 ss_en, ss_en_mask;
        u8 eu_en;
@@ -203,7 +203,7 @@ static void gen11_sseu_info_init(struct drm_i915_private *dev_priv)
 
 static void gen10_sseu_info_init(struct drm_i915_private *dev_priv)
 {
-       struct sseu_dev_info *sseu = &mkwrite_device_info(dev_priv)->sseu;
+       struct sseu_dev_info *sseu = &RUNTIME_INFO(dev_priv)->sseu;
        const u32 fuse2 = I915_READ(GEN8_FUSE2);
        int s, ss;
        const int eu_mask = 0xff;
@@ -280,7 +280,7 @@ static void gen10_sseu_info_init(struct drm_i915_private *dev_priv)
 
 static void cherryview_sseu_info_init(struct drm_i915_private *dev_priv)
 {
-       struct sseu_dev_info *sseu = &mkwrite_device_info(dev_priv)->sseu;
+       struct sseu_dev_info *sseu = &RUNTIME_INFO(dev_priv)->sseu;
        u32 fuse;
 
        fuse = I915_READ(CHV_FUSE_GT);
@@ -334,7 +334,7 @@ static void cherryview_sseu_info_init(struct drm_i915_private *dev_priv)
 static void gen9_sseu_info_init(struct drm_i915_private *dev_priv)
 {
        struct intel_device_info *info = mkwrite_device_info(dev_priv);
-       struct sseu_dev_info *sseu = &info->sseu;
+       struct sseu_dev_info *sseu = &RUNTIME_INFO(dev_priv)->sseu;
        int s, ss;
        u32 fuse2, eu_disable, subslice_mask;
        const u8 eu_mask = 0xff;
@@ -437,7 +437,7 @@ static void gen9_sseu_info_init(struct drm_i915_private *dev_priv)
 
 static void broadwell_sseu_info_init(struct drm_i915_private *dev_priv)
 {
-       struct sseu_dev_info *sseu = &mkwrite_device_info(dev_priv)->sseu;
+       struct sseu_dev_info *sseu = &RUNTIME_INFO(dev_priv)->sseu;
        int s, ss;
        u32 fuse2, subslice_mask, eu_disable[3]; /* s_max */
 
@@ -519,8 +519,7 @@ static void broadwell_sseu_info_init(struct drm_i915_private *dev_priv)
 
 static void haswell_sseu_info_init(struct drm_i915_private *dev_priv)
 {
-       struct intel_device_info *info = mkwrite_device_info(dev_priv);
-       struct sseu_dev_info *sseu = &info->sseu;
+       struct sseu_dev_info *sseu = &RUNTIME_INFO(dev_priv)->sseu;
        u32 fuse1;
        int s, ss;
 
@@ -528,9 +527,9 @@ static void haswell_sseu_info_init(struct drm_i915_private *dev_priv)
         * There isn't a register to tell us how many slices/subslices. We
         * work off the PCI-ids here.
         */
-       switch (info->gt) {
+       switch (INTEL_INFO(dev_priv)->gt) {
        default:
-               MISSING_CASE(info->gt);
+               MISSING_CASE(INTEL_INFO(dev_priv)->gt);
                /* fall through */
        case 1:
                sseu->slice_mask = BIT(0);
@@ -743,25 +742,26 @@ void intel_device_info_runtime_init(struct intel_device_info *info)
 {
        struct drm_i915_private *dev_priv =
                container_of(info, struct drm_i915_private, info);
+       struct intel_runtime_info *runtime = RUNTIME_INFO(dev_priv);
        enum pipe pipe;
 
        if (INTEL_GEN(dev_priv) >= 10) {
                for_each_pipe(dev_priv, pipe)
-                       info->num_scalers[pipe] = 2;
+                       runtime->num_scalers[pipe] = 2;
        } else if (IS_GEN(dev_priv, 9)) {
-               info->num_scalers[PIPE_A] = 2;
-               info->num_scalers[PIPE_B] = 2;
-               info->num_scalers[PIPE_C] = 1;
+               runtime->num_scalers[PIPE_A] = 2;
+               runtime->num_scalers[PIPE_B] = 2;
+               runtime->num_scalers[PIPE_C] = 1;
        }
 
        BUILD_BUG_ON(I915_NUM_ENGINES > BITS_PER_TYPE(intel_ring_mask_t));
 
        if (IS_GEN(dev_priv, 11))
                for_each_pipe(dev_priv, pipe)
-                       info->num_sprites[pipe] = 6;
+                       runtime->num_sprites[pipe] = 6;
        else if (IS_GEN(dev_priv, 10) || IS_GEMINILAKE(dev_priv))
                for_each_pipe(dev_priv, pipe)
-                       info->num_sprites[pipe] = 3;
+                       runtime->num_sprites[pipe] = 3;
        else if (IS_BROXTON(dev_priv)) {
                /*
                 * Skylake and Broxton currently don't expose the topmost plane as its
@@ -772,15 +772,15 @@ void intel_device_info_runtime_init(struct intel_device_info *info)
                 * down the line.
                 */
 
-               info->num_sprites[PIPE_A] = 2;
-               info->num_sprites[PIPE_B] = 2;
-               info->num_sprites[PIPE_C] = 1;
+               runtime->num_sprites[PIPE_A] = 2;
+               runtime->num_sprites[PIPE_B] = 2;
+               runtime->num_sprites[PIPE_C] = 1;
        } else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
                for_each_pipe(dev_priv, pipe)
-                       info->num_sprites[pipe] = 2;
+                       runtime->num_sprites[pipe] = 2;
        } else if (INTEL_GEN(dev_priv) >= 5 || IS_G4X(dev_priv)) {
                for_each_pipe(dev_priv, pipe)
-                       info->num_sprites[pipe] = 1;
+                       runtime->num_sprites[pipe] = 1;
        }
 
        if (i915_modparams.disable_display) {
@@ -864,7 +864,7 @@ void intel_device_info_runtime_init(struct intel_device_info *info)
        }
 
        /* Initialize command stream timestamp frequency */
-       info->cs_timestamp_frequency_khz = read_timestamp_frequency(dev_priv);
+       runtime->cs_timestamp_frequency_khz = read_timestamp_frequency(dev_priv);
 }
 
 void intel_driver_caps_print(const struct intel_driver_caps *caps,
@@ -893,16 +893,16 @@ void intel_device_info_init_mmio(struct drm_i915_private *dev_priv)
 
        media_fuse = ~I915_READ(GEN11_GT_VEBOX_VDBOX_DISABLE);
 
-       info->vdbox_enable = media_fuse & GEN11_GT_VDBOX_DISABLE_MASK;
-       info->vebox_enable = (media_fuse & GEN11_GT_VEBOX_DISABLE_MASK) >>
-                            GEN11_GT_VEBOX_DISABLE_SHIFT;
+       RUNTIME_INFO(dev_priv)->vdbox_enable = media_fuse & GEN11_GT_VDBOX_DISABLE_MASK;
+       RUNTIME_INFO(dev_priv)->vebox_enable = (media_fuse & GEN11_GT_VEBOX_DISABLE_MASK) >>
+               GEN11_GT_VEBOX_DISABLE_SHIFT;
 
-       DRM_DEBUG_DRIVER("vdbox enable: %04x\n", info->vdbox_enable);
+       DRM_DEBUG_DRIVER("vdbox enable: %04x\n", RUNTIME_INFO(dev_priv)->vdbox_enable);
        for (i = 0; i < I915_MAX_VCS; i++) {
                if (!HAS_ENGINE(dev_priv, _VCS(i)))
                        continue;
 
-               if (!(BIT(i) & info->vdbox_enable)) {
+               if (!(BIT(i) & RUNTIME_INFO(dev_priv)->vdbox_enable)) {
                        info->ring_mask &= ~ENGINE_MASK(_VCS(i));
                        DRM_DEBUG_DRIVER("vcs%u fused off\n", i);
                        continue;
@@ -913,15 +913,15 @@ void intel_device_info_init_mmio(struct drm_i915_private *dev_priv)
                 * hooked up to an SFC (Scaler & Format Converter) unit.
                 */
                if (logical_vdbox++ % 2 == 0)
-                       info->vdbox_sfc_access |= BIT(i);
+                       RUNTIME_INFO(dev_priv)->vdbox_sfc_access |= BIT(i);
        }
 
-       DRM_DEBUG_DRIVER("vebox enable: %04x\n", info->vebox_enable);
+       DRM_DEBUG_DRIVER("vebox enable: %04x\n", RUNTIME_INFO(dev_priv)->vebox_enable);
        for (i = 0; i < I915_MAX_VECS; i++) {
                if (!HAS_ENGINE(dev_priv, _VECS(i)))
                        continue;
 
-               if (!(BIT(i) & info->vebox_enable)) {
+               if (!(BIT(i) & RUNTIME_INFO(dev_priv)->vebox_enable)) {
                        info->ring_mask &= ~ENGINE_MASK(_VECS(i));
                        DRM_DEBUG_DRIVER("vecs%u fused off\n", i);
                }

diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
index dd34f974a857227630b83fd205db083a43d77764..fa81ee15dfa1bd8b52f38befae594dd57e14c82d 100644 (file)
--- a/drivers/gpu/drm/i915/intel_device_info.h
+++ b/drivers/gpu/drm/i915/intel_device_info.h
@@ -152,12 +152,10 @@ struct sseu_dev_info {
 typedef u8 intel_ring_mask_t;
 
 struct intel_device_info {
-       u16 device_id;
        u16 gen_mask;
 
        u8 gen;
        u8 gt; /* GT number, 0 if undefined */
-       u8 num_rings;
        intel_ring_mask_t ring_mask; /* Rings supported by the HW */
 
        enum intel_platform platform;
@@ -169,8 +167,6 @@ struct intel_device_info {
        u32 display_mmio_offset;
 
        u8 num_pipes;
-       u8 num_sprites[I915_MAX_PIPES];
-       u8 num_scalers[I915_MAX_PIPES];
 
 #define DEFINE_FLAG(name) u8 name:1
        DEV_INFO_FOR_EACH_FLAG(DEFINE_FLAG);
@@ -189,6 +185,20 @@ struct intel_device_info {
        int trans_offsets[I915_MAX_TRANSCODERS];
        int cursor_offsets[I915_MAX_PIPES];
 
+       struct color_luts {
+               u16 degamma_lut_size;
+               u16 gamma_lut_size;
+       } color;
+};
+
+struct intel_runtime_info {
+       u16 device_id;
+
+       u8 num_sprites[I915_MAX_PIPES];
+       u8 num_scalers[I915_MAX_PIPES];
+
+       u8 num_rings;
+
        /* Slice/subslice/EU info */
        struct sseu_dev_info sseu;
 
@@ -200,11 +210,6 @@ struct intel_device_info {
 
        /* Media engine access to SFC per instance */
        u8 vdbox_sfc_access;
-
-       struct color_luts {
-               u16 degamma_lut_size;
-               u16 gamma_lut_size;
-       } color;
 };
 
 struct intel_driver_caps {
@@ -266,7 +271,7 @@ void intel_device_info_dump(const struct intel_device_info *info,
                            struct drm_printer *p);
 void intel_device_info_dump_flags(const struct intel_device_info *info,
                                  struct drm_printer *p);
-void intel_device_info_dump_runtime(const struct intel_device_info *info,
+void intel_device_info_dump_runtime(const struct intel_runtime_info *info,
                                    struct drm_printer *p);
 void intel_device_info_dump_topology(const struct sseu_dev_info *sseu,
                                     struct drm_printer *p);

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index ab3b4d02d4994b5ee4c1604a3369eaa7de63fcbe..665b483bbbccf2e1fd4b6045e1587fe8bddb1c49 100644 (file)
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -14060,7 +14060,7 @@ static void intel_crtc_init_scalers(struct intel_crtc *crtc,
        struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
        int i;
 
-       crtc->num_scalers = dev_priv->info.num_scalers[crtc->pipe];
+       crtc->num_scalers = RUNTIME_INFO(dev_priv)->num_scalers[crtc->pipe];
        if (!crtc->num_scalers)
                return;
 

diff --git a/drivers/gpu/drm/i915/intel_display.h b/drivers/gpu/drm/i915/intel_display.h
index 4262452963b31442363fe13ccf812c645a831fb7..c7c0686622884206a1fe89854527e7a6bced050e 100644 (file)
--- a/drivers/gpu/drm/i915/intel_display.h
+++ b/drivers/gpu/drm/i915/intel_display.h
@@ -121,7 +121,7 @@ enum i9xx_plane_id {
 };
 
 #define plane_name(p) ((p) + 'A')
-#define sprite_name(p, s) ((p) * INTEL_INFO(dev_priv)->num_sprites[(p)] + (s) + 'A')
+#define sprite_name(p, s) ((p) * RUNTIME_INFO(dev_priv)->num_sprites[(p)] + (s) + 'A')
 
 /*
  * Per-pipe plane identifier.
@@ -311,12 +311,12 @@ struct intel_link_m_n {
 
 #define for_each_universal_plane(__dev_priv, __pipe, __p)              \
        for ((__p) = 0;                                                 \
-            (__p) < INTEL_INFO(__dev_priv)->num_sprites[(__pipe)] + 1; \
+            (__p) < RUNTIME_INFO(__dev_priv)->num_sprites[(__pipe)] + 1;       \
             (__p)++)
 
 #define for_each_sprite(__dev_priv, __p, __s)                          \
        for ((__s) = 0;                                                 \
-            (__s) < INTEL_INFO(__dev_priv)->num_sprites[(__p)];        \
+            (__s) < RUNTIME_INFO(__dev_priv)->num_sprites[(__p)];      \
             (__s)++)
 
 #define for_each_port_masked(__port, __ports_mask) \

diff --git a/drivers/gpu/drm/i915/intel_engine_cs.c b/drivers/gpu/drm/i915/intel_engine_cs.c
index 92ed729db1f2c0bea59997db20035fed6a4be4f5..2aa3e0d7e6a3d15cbd4dd6596e0b259b18fce9a9 100644 (file)
--- a/drivers/gpu/drm/i915/intel_engine_cs.c
+++ b/drivers/gpu/drm/i915/intel_engine_cs.c
@@ -393,7 +393,7 @@ int intel_engines_init_mmio(struct drm_i915_private *dev_priv)
                goto cleanup;
        }
 
-       device_info->num_rings = hweight32(mask);
+       RUNTIME_INFO(dev_priv)->num_rings = hweight32(mask);
 
        i915_check_and_clear_faults(dev_priv);
 
@@ -782,7 +782,7 @@ const char *i915_cache_level_str(struct drm_i915_private *i915, int type)
 
 u32 intel_calculate_mcr_s_ss_select(struct drm_i915_private *dev_priv)
 {
-       const struct sseu_dev_info *sseu = &(INTEL_INFO(dev_priv)->sseu);
+       const struct sseu_dev_info *sseu = &RUNTIME_INFO(dev_priv)->sseu;
        u32 mcr_s_ss_select;
        u32 slice = fls(sseu->slice_mask);
        u32 subslice = fls(sseu->subslice_mask[slice]);

diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index 2482dde6e56bb3c3770112db1f1ba2319009e7d9..d81ae121c45e058a72bef706e1bd75e68acf5459 100644 (file)
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -2312,9 +2312,9 @@ int logical_xcs_ring_init(struct intel_engine_cs *engine)
 static u32
 make_rpcs(struct drm_i915_private *dev_priv)
 {
-       bool subslice_pg = INTEL_INFO(dev_priv)->sseu.has_subslice_pg;
-       u8 slices = hweight8(INTEL_INFO(dev_priv)->sseu.slice_mask);
-       u8 subslices = hweight8(INTEL_INFO(dev_priv)->sseu.subslice_mask[0]);
+       bool subslice_pg = RUNTIME_INFO(dev_priv)->sseu.has_subslice_pg;
+       u8 slices = hweight8(RUNTIME_INFO(dev_priv)->sseu.slice_mask);
+       u8 subslices = hweight8(RUNTIME_INFO(dev_priv)->sseu.subslice_mask[0]);
        u32 rpcs = 0;
 
        /*
@@ -2362,7 +2362,7 @@ make_rpcs(struct drm_i915_private *dev_priv)
         * must make an explicit request through RPCS for full
         * enablement.
        */
-       if (INTEL_INFO(dev_priv)->sseu.has_slice_pg) {
+       if (RUNTIME_INFO(dev_priv)->sseu.has_slice_pg) {
                u32 mask, val = slices;
 
                if (INTEL_GEN(dev_priv) >= 11) {
@@ -2390,17 +2390,17 @@ make_rpcs(struct drm_i915_private *dev_priv)
                rpcs |= GEN8_RPCS_ENABLE | GEN8_RPCS_SS_CNT_ENABLE | val;
        }
 
-       if (INTEL_INFO(dev_priv)->sseu.has_eu_pg) {
+       if (RUNTIME_INFO(dev_priv)->sseu.has_eu_pg) {
                u32 val;
 
-               val = INTEL_INFO(dev_priv)->sseu.eu_per_subslice <<
+               val = RUNTIME_INFO(dev_priv)->sseu.eu_per_subslice <<
                      GEN8_RPCS_EU_MIN_SHIFT;
                GEM_BUG_ON(val & ~GEN8_RPCS_EU_MIN_MASK);
                val &= GEN8_RPCS_EU_MIN_MASK;
 
                rpcs |= val;
 
-               val = INTEL_INFO(dev_priv)->sseu.eu_per_subslice <<
+               val = RUNTIME_INFO(dev_priv)->sseu.eu_per_subslice <<
                      GEN8_RPCS_EU_MAX_SHIFT;
                GEM_BUG_ON(val & ~GEN8_RPCS_EU_MAX_MASK);
                val &= GEN8_RPCS_EU_MAX_MASK;

diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 2a6ffb8b975a73b299635c672f16f8b15dc0d6a2..83b01cde8113ddc17619bfa352a3f227b2cae407 100644 (file)
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -7274,7 +7274,7 @@ static int cherryview_rps_max_freq(struct drm_i915_private *dev_priv)
 
        val = vlv_punit_read(dev_priv, FB_GFX_FMAX_AT_VMAX_FUSE);
 
-       switch (INTEL_INFO(dev_priv)->sseu.eu_total) {
+       switch (RUNTIME_INFO(dev_priv)->sseu.eu_total) {
        case 8:
                /* (2 * 4) config */
                rp0 = (val >> FB_GFX_FMAX_AT_VMAX_2SS4EU_FUSE_SHIFT);

diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index f8d3090ed193b9507c1dc006c268006cdcaddea3..8967dcb5f58faec72f886d3a47fd8a6ac3c13c70 100644 (file)
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -1607,7 +1607,7 @@ static inline int mi_set_context(struct i915_request *rq, u32 flags)
        struct intel_engine_cs *engine = rq->engine;
        enum intel_engine_id id;
        const int num_rings =
-               IS_HSW_GT1(i915) ? INTEL_INFO(i915)->num_rings - 1 : 0;
+               IS_HSW_GT1(i915) ? RUNTIME_INFO(i915)->num_rings - 1 : 0;
        bool force_restore = false;
        int len;
        u32 *cs;

diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
index 91ef00d34e9147cdd360de85a298427c6faa7c8e..69287e77b929194b2a9d983d8791ec3e4b23486b 100644 (file)
--- a/drivers/gpu/drm/i915/intel_ringbuffer.h
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
@@ -95,11 +95,11 @@ hangcheck_action_to_str(const enum intel_engine_hangcheck_action a)
 
 #define instdone_slice_mask(dev_priv__) \
        (IS_GEN(dev_priv__, 7) ? \
-        1 : INTEL_INFO(dev_priv__)->sseu.slice_mask)
+        1 : RUNTIME_INFO(dev_priv__)->sseu.slice_mask)
 
 #define instdone_subslice_mask(dev_priv__) \
        (IS_GEN(dev_priv__, 7) ? \
-        1 : INTEL_INFO(dev_priv__)->sseu.subslice_mask[0])
+        1 : RUNTIME_INFO(dev_priv__)->sseu.subslice_mask[0])
 
 #define for_each_instdone_slice_subslice(dev_priv__, slice__, subslice__) \
        for ((slice__) = 0, (subslice__) = 0; \

diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
index 5800f0ce2c5778f3773669bf4cc388c37f84bfc1..e5e5c6e9ed28e5f04c8184666abdc70afef81926 100644 (file)
--- a/drivers/gpu/drm/i915/intel_uncore.c
+++ b/drivers/gpu/drm/i915/intel_uncore.c
@@ -1934,7 +1934,7 @@ static int gen6_reset_engines(struct drm_i915_private *dev_priv,
 static u32 gen11_lock_sfc(struct drm_i915_private *dev_priv,
                          struct intel_engine_cs *engine)
 {
-       u8 vdbox_sfc_access = INTEL_INFO(dev_priv)->vdbox_sfc_access;
+       u8 vdbox_sfc_access = RUNTIME_INFO(dev_priv)->vdbox_sfc_access;
        i915_reg_t sfc_forced_lock, sfc_forced_lock_ack;
        u32 sfc_forced_lock_bit, sfc_forced_lock_ack_bit;
        i915_reg_t sfc_usage;
@@ -2002,7 +2002,7 @@ static u32 gen11_lock_sfc(struct drm_i915_private *dev_priv,
 static void gen11_unlock_sfc(struct drm_i915_private *dev_priv,
                             struct intel_engine_cs *engine)
 {
-       u8 vdbox_sfc_access = INTEL_INFO(dev_priv)->vdbox_sfc_access;
+       u8 vdbox_sfc_access = RUNTIME_INFO(dev_priv)->vdbox_sfc_access;
        i915_reg_t sfc_forced_lock;
        u32 sfc_forced_lock_bit;
 

diff --git a/drivers/gpu/drm/i915/intel_workarounds.c b/drivers/gpu/drm/i915/intel_workarounds.c
index 7a86180654915363478cbea2936f51adcb02f816..480c53a2ecb550bbf0471270e19bea395ba44215 100644 (file)
--- a/drivers/gpu/drm/i915/intel_workarounds.c
+++ b/drivers/gpu/drm/i915/intel_workarounds.c
@@ -366,7 +366,7 @@ static void skl_tune_iz_hashing(struct intel_engine_cs *engine)
                 * Only consider slices where one, and only one, subslice has 7
                 * EUs
                 */
-               if (!is_power_of_2(INTEL_INFO(i915)->sseu.subslice_7eu[i]))
+               if (!is_power_of_2(RUNTIME_INFO(i915)->sseu.subslice_7eu[i]))
                        continue;
 
                /*
@@ -375,7 +375,7 @@ static void skl_tune_iz_hashing(struct intel_engine_cs *engine)
                 *
                 * ->    0 <= ss <= 3;
                 */
-               ss = ffs(INTEL_INFO(i915)->sseu.subslice_7eu[i]) - 1;
+               ss = ffs(RUNTIME_INFO(i915)->sseu.subslice_7eu[i]) - 1;
                vals[i] = 3 - ss;
        }
 
@@ -743,7 +743,7 @@ static void cfl_gt_workarounds_init(struct drm_i915_private *i915)
 
 static void wa_init_mcr(struct drm_i915_private *dev_priv)
 {
-       const struct sseu_dev_info *sseu = &(INTEL_INFO(dev_priv)->sseu);
+       const struct sseu_dev_info *sseu = &RUNTIME_INFO(dev_priv)->sseu;
        struct i915_wa_list *wal = &dev_priv->gt_wa_list;
        u32 mcr_slice_subslice_mask;
 

diff --git a/drivers/gpu/drm/i915/selftests/i915_gem_context.c b/drivers/gpu/drm/i915/selftests/i915_gem_context.c
index 7d82043aff1099c82a35fde7fe0bce2f4b454bcb..d00cdf3c2939a34cd17624cd598cad5dcefac75e 100644 (file)
--- a/drivers/gpu/drm/i915/selftests/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/selftests/i915_gem_context.c
@@ -627,7 +627,7 @@ static int igt_ctx_exec(void *arg)
                ncontexts++;
        }
        pr_info("Submitted %lu contexts (across %u engines), filling %lu dwords\n",
-               ncontexts, INTEL_INFO(i915)->num_rings, ndwords);
+               ncontexts, RUNTIME_INFO(i915)->num_rings, ndwords);
 
        dw = 0;
        list_for_each_entry(obj, &objects, st_link) {
@@ -732,7 +732,7 @@ static int igt_ctx_readonly(void *arg)
                }
        }
        pr_info("Submitted %lu dwords (across %u engines)\n",
-               ndwords, INTEL_INFO(i915)->num_rings);
+               ndwords, RUNTIME_INFO(i915)->num_rings);
 
        dw = 0;
        list_for_each_entry(obj, &objects, st_link) {
@@ -1064,7 +1064,7 @@ static int igt_vm_isolation(void *arg)
                count += this;
        }
        pr_info("Checked %lu scratch offsets across %d engines\n",
-               count, INTEL_INFO(i915)->num_rings);
+               count, RUNTIME_INFO(i915)->num_rings);
 
 out_rpm:
        intel_runtime_pm_put(i915);

diff --git a/drivers/gpu/drm/i915/selftests/intel_lrc.c b/drivers/gpu/drm/i915/selftests/intel_lrc.c
index ca461e3a5f27ffe8bd85b9f0dc4e17078ff5468d..00caaa00f02fd400693b11ced0ccd76c155fcfde 100644 (file)
--- a/drivers/gpu/drm/i915/selftests/intel_lrc.c
+++ b/drivers/gpu/drm/i915/selftests/intel_lrc.c
@@ -522,7 +522,7 @@ static int smoke_crescendo(struct preempt_smoke *smoke, unsigned int flags)
 
        pr_info("Submitted %lu crescendo:%x requests across %d engines and %d contexts\n",
                count, flags,
-               INTEL_INFO(smoke->i915)->num_rings, smoke->ncontext);
+               RUNTIME_INFO(smoke->i915)->num_rings, smoke->ncontext);
        return 0;
 }
 
@@ -550,7 +550,7 @@ static int smoke_random(struct preempt_smoke *smoke, unsigned int flags)
 
        pr_info("Submitted %lu random:%x requests across %d engines and %d contexts\n",
                count, flags,
-               INTEL_INFO(smoke->i915)->num_rings, smoke->ncontext);
+               RUNTIME_INFO(smoke->i915)->num_rings, smoke->ncontext);
        return 0;
 }