u8 setdata[1];
        u8 getdata[3];
 
-       spinlock_t irqlock;
+       raw_spinlock_t irqlock;
        u32 irq_enable;
        u32 irq_status;
        u32 irq_type[20];
 
        mutex_lock(&ddata->lock);
 
-       spin_lock_irq(&ddata->irqlock);
+       raw_spin_lock_irq(&ddata->irqlock);
 
        for (offset = 0; offset < 12; ++offset) {
                unsigned int bitpos = 11 - offset;
 
        trigger = ddata->irq_status & ddata->irq_enable;
 
-       spin_unlock_irq(&ddata->irqlock);
+       raw_spin_unlock_irq(&ddata->irqlock);
 
        ddata->getdata[0] = buf[0];
        ddata->getdata[1] = buf[1];
                         * handler of the irq chip. But it doesn't, so we have
                         * to clean the irq_status here.
                         */
-                       spin_lock_irq(&ddata->irqlock);
+                       raw_spin_lock_irq(&ddata->irqlock);
                        ddata->irq_status &= ~(1 << offset);
-                       spin_unlock_irq(&ddata->irqlock);
+                       raw_spin_unlock_irq(&ddata->irqlock);
 
                        handle_nested_irq(irq);
                }
        struct gpio_siox_ddata *ddata =
                container_of(ic, struct gpio_siox_ddata, ichip);
 
-       spin_lock_irq(&ddata->irqlock);
+       raw_spin_lock(&ddata->irqlock);
        ddata->irq_status &= ~(1 << d->hwirq);
-       spin_unlock_irq(&ddata->irqlock);
+       raw_spin_unlock(&ddata->irqlock);
 }
 
 static void gpio_siox_irq_mask(struct irq_data *d)
        struct gpio_siox_ddata *ddata =
                container_of(ic, struct gpio_siox_ddata, ichip);
 
-       spin_lock_irq(&ddata->irqlock);
+       raw_spin_lock(&ddata->irqlock);
        ddata->irq_enable &= ~(1 << d->hwirq);
-       spin_unlock_irq(&ddata->irqlock);
+       raw_spin_unlock(&ddata->irqlock);
 }
 
 static void gpio_siox_irq_unmask(struct irq_data *d)
        struct gpio_siox_ddata *ddata =
                container_of(ic, struct gpio_siox_ddata, ichip);
 
-       spin_lock_irq(&ddata->irqlock);
+       raw_spin_lock(&ddata->irqlock);
        ddata->irq_enable |= 1 << d->hwirq;
-       spin_unlock_irq(&ddata->irqlock);
+       raw_spin_unlock(&ddata->irqlock);
 }
 
 static int gpio_siox_irq_set_type(struct irq_data *d, u32 type)
        struct gpio_siox_ddata *ddata =
                container_of(ic, struct gpio_siox_ddata, ichip);
 
-       spin_lock_irq(&ddata->irqlock);
+       raw_spin_lock(&ddata->irqlock);
        ddata->irq_type[d->hwirq] = type;
-       spin_unlock_irq(&ddata->irqlock);
+       raw_spin_unlock(&ddata->irqlock);
 
        return 0;
 }
        dev_set_drvdata(dev, ddata);
 
        mutex_init(&ddata->lock);
-       spin_lock_init(&ddata->irqlock);
+       raw_spin_lock_init(&ddata->irqlock);
 
        ddata->gchip.base = -1;
        ddata->gchip.can_sleep = 1;