KVM: vmx: do not unconditionally clear EFER switching

Do not unconditionally call clear_atomic_switch_msr() when updating
EFER.  This adds up to four unnecessary VMWrites in the case where
guest_efer != host_efer, e.g. if the load_on_{entry,exit} bits were
already set.

Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com>
Reviewed-by: Jim Mattson <jmattson@google.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
index 36d6025599586e603d6aeb6c4c755795b6b6af16..7a245f1dca8706522cf86e3621007d7a70aa6dd1 100644 (file)
--- a/arch/x86/kvm/vmx.c
+++ b/arch/x86/kvm/vmx.c
@@ -2790,8 +2790,6 @@ static bool update_transition_efer(struct vcpu_vmx *vmx, int efer_offset)
                ignore_bits &= ~(u64)EFER_SCE;
 #endif
 
-       clear_atomic_switch_msr(vmx, MSR_EFER);
-
        /*
         * On EPT, we can't emulate NX, so we must switch EFER atomically.
         * On CPUs that support "load IA32_EFER", always switch EFER
@@ -2804,8 +2802,12 @@ static bool update_transition_efer(struct vcpu_vmx *vmx, int efer_offset)
                if (guest_efer != host_efer)
                        add_atomic_switch_msr(vmx, MSR_EFER,
                                              guest_efer, host_efer, false);
+               else
+                       clear_atomic_switch_msr(vmx, MSR_EFER);
                return false;
        } else {
+               clear_atomic_switch_msr(vmx, MSR_EFER);
+
                guest_efer &= ~ignore_bits;
                guest_efer |= host_efer & ignore_bits;