.quirks         = S3C64XX_SPI_QUIRK_CS_AUTO,
 };
 
+static const struct s3c64xx_spi_port_config exynos850_spi_port_config = {
+       .fifo_lvl_mask  = { 0x7f, 0x7f, 0x7f },
+       .rx_lvl_offset  = 15,
+       .tx_st_done     = 25,
+       .clk_div        = 4,
+       .high_speed     = true,
+       .clk_from_cmu   = true,
+       .has_loopback   = true,
+       .quirks         = S3C64XX_SPI_QUIRK_CS_AUTO,
+};
+
 static const struct s3c64xx_spi_port_config exynosautov9_spi_port_config = {
        .fifo_lvl_mask  = { 0x1ff, 0x1ff, 0x7f, 0x7f, 0x7f, 0x7f, 0x1ff, 0x7f,
                            0x7f, 0x7f, 0x7f, 0x7f},
        { .compatible = "samsung,exynos5433-spi",
                        .data = (void *)&exynos5433_spi_port_config,
        },
+       { .compatible = "samsung,exynos850-spi",
+                       .data = (void *)&exynos850_spi_port_config,
+       },
        { .compatible = "samsung,exynosautov9-spi",
                        .data = (void *)&exynosautov9_spi_port_config,
        },