return amdgpu_vram_mgr_usage(vram_man);
 }
 
-uint64_t amdgpu_amdkfd_get_hive_id(struct amdgpu_device *adev)
-{
-       return adev->gmc.xgmi.hive_id;
-}
-
-uint64_t amdgpu_amdkfd_get_unique_id(struct amdgpu_device *adev)
-{
-       return adev->unique_id;
-}
-
 uint8_t amdgpu_amdkfd_get_xgmi_hops_count(struct amdgpu_device *dst,
                                          struct amdgpu_device *src)
 {
        return (num_lanes_factor * gen_speed_mbits_factor)/BITS_PER_BYTE;
 }
 
-uint64_t amdgpu_amdkfd_get_mmio_remap_phys_addr(struct amdgpu_device *adev)
-{
-       return adev->rmmio_remap.bus_addr;
-}
-
-uint32_t amdgpu_amdkfd_get_num_gws(struct amdgpu_device *adev)
-{
-       return adev->gds.gws_size;
-}
-
-uint32_t amdgpu_amdkfd_get_asic_rev_id(struct amdgpu_device *adev)
-{
-       return adev->rev_id;
-}
-
-int amdgpu_amdkfd_get_noretry(struct amdgpu_device *adev)
-{
-       return adev->gmc.noretry;
-}
-
 int amdgpu_amdkfd_submit_ib(struct amdgpu_device *adev,
                                enum kgd_engine_type engine,
                                uint32_t vmid, uint64_t gpu_addr,
 
                                  size_t buffer_size, uint32_t *metadata_size,
                                  uint32_t *flags);
 uint64_t amdgpu_amdkfd_get_vram_usage(struct amdgpu_device *adev);
-uint64_t amdgpu_amdkfd_get_hive_id(struct amdgpu_device *adev);
-uint64_t amdgpu_amdkfd_get_unique_id(struct amdgpu_device *adev);
-uint64_t amdgpu_amdkfd_get_mmio_remap_phys_addr(struct amdgpu_device *adev);
-uint32_t amdgpu_amdkfd_get_num_gws(struct amdgpu_device *adev);
-uint32_t amdgpu_amdkfd_get_asic_rev_id(struct amdgpu_device *adev);
-int amdgpu_amdkfd_get_noretry(struct amdgpu_device *adev);
 uint8_t amdgpu_amdkfd_get_xgmi_hops_count(struct amdgpu_device *dst,
                                          struct amdgpu_device *src);
 int amdgpu_amdkfd_get_xgmi_bandwidth_mbytes(struct amdgpu_device *dst,
 
                        err = -EINVAL;
                        goto err_unlock;
                }
-               offset = amdgpu_amdkfd_get_mmio_remap_phys_addr(dev->adev);
+               offset = dev->adev->rmmio_remap.bus_addr;
                if (!offset) {
                        err = -ENOMEM;
                        goto err_unlock;
        if (vma->vm_end - vma->vm_start != PAGE_SIZE)
                return -EINVAL;
 
-       address = amdgpu_amdkfd_get_mmio_remap_phys_addr(dev->adev);
+       address = dev->adev->rmmio_remap.bus_addr;
 
        vma->vm_flags |= VM_IO | VM_DONTCOPY | VM_DONTEXPAND | VM_NORESERVE |
                                VM_DONTDUMP | VM_PFNMAP;
 
                || (kfd->device_info->asic_family == CHIP_ALDEBARAN
                        && kfd->mec2_fw_version >= 0x28))
                ret = amdgpu_amdkfd_alloc_gws(kfd->adev,
-                               amdgpu_amdkfd_get_num_gws(kfd->adev), &kfd->gws);
+                               kfd->adev->gds.gws_size, &kfd->gws);
 
        return ret;
 }
                goto kfd_doorbell_error;
        }
 
-       kfd->hive_id = amdgpu_amdkfd_get_hive_id(kfd->adev);
+       kfd->hive_id = kfd->adev->gmc.xgmi.hive_id;
 
-       kfd->noretry = amdgpu_amdkfd_get_noretry(kfd->adev);
+       kfd->noretry = kfd->adev->gmc.noretry;
 
        if (kfd_interrupt_init(kfd)) {
                dev_err(kfd_device, "Error initializing interrupts\n");
         */
        if (kfd_gws_init(kfd)) {
                dev_err(kfd_device, "Could not allocate %d gws\n",
-                       amdgpu_amdkfd_get_num_gws(kfd->adev));
+                       kfd->adev->gds.gws_size);
                goto gws_error;
        }
 
 
                return ret;
 
        pqn->q->gws = mem;
-       pdd->qpd.num_gws = gws ? amdgpu_amdkfd_get_num_gws(dev->adev) : 0;
+       pdd->qpd.num_gws = gws ? dev->adev->gds.gws_size : 0;
 
        return pqn->q->device->dqm->ops.update_queue(pqn->q->device->dqm,
                                                        pqn->q, NULL);
 
                sysfs_show_32bit_prop(buffer, offs, "sdma_fw_version",
                                      dev->gpu->sdma_fw_version);
                sysfs_show_64bit_prop(buffer, offs, "unique_id",
-                                     amdgpu_amdkfd_get_unique_id(dev->gpu->adev));
+                                     dev->gpu->adev->unique_id);
 
        }
 
        dev->node_props.vendor_id = gpu->pdev->vendor;
        dev->node_props.device_id = gpu->pdev->device;
        dev->node_props.capability |=
-               ((amdgpu_amdkfd_get_asic_rev_id(dev->gpu->adev) <<
-                       HSA_CAP_ASIC_REVISION_SHIFT) &
+               ((dev->gpu->adev->rev_id << HSA_CAP_ASIC_REVISION_SHIFT) &
                        HSA_CAP_ASIC_REVISION_MASK);
        dev->node_props.location_id = pci_dev_id(gpu->pdev);
        dev->node_props.domain = pci_domain_nr(gpu->pdev->bus);
                                gpu->device_info->num_sdma_queues_per_engine;
        dev->node_props.num_gws = (dev->gpu->gws &&
                dev->gpu->dqm->sched_policy != KFD_SCHED_POLICY_NO_HWS) ?
-               amdgpu_amdkfd_get_num_gws(dev->gpu->adev) : 0;
+               dev->gpu->adev->gds.gws_size : 0;
        dev->node_props.num_cp_queues = get_cp_queues_num(dev->gpu->dqm);
 
        kfd_fill_mem_clk_max_info(dev);