bool force_chroma_subsampling_1tap;
        bool disable_422_left_edge_pixel;
        bool dml21_force_pstate_method;
-       uint32_t dml21_force_pstate_method_value;
+       uint32_t dml21_force_pstate_method_values[MAX_PIPES];
        uint32_t dml21_disable_pstate_method_mask;
        union dmub_fams2_global_feature_config fams2_config;
        bool enable_legacy_clock_update;
 
                                /* apply forced pstate policy */
                                if (dml_ctx->config.pmo.force_pstate_method_enable) {
                                        dml_dispcfg->plane_descriptors[disp_cfg_plane_location].overrides.uclk_pstate_change_strategy =
-                                                       dml21_force_pstate_method_to_uclk_state_change_strategy(dml_ctx->config.pmo.force_pstate_method_value);
+                                                       dml21_force_pstate_method_to_uclk_state_change_strategy(dml_ctx->config.pmo.force_pstate_method_values[stream_index]);
                                }
                        }
                }
 
        /* UCLK P-State options */
        if (in_dc->debug.dml21_force_pstate_method) {
                dml_ctx->config.pmo.force_pstate_method_enable = true;
-               dml_ctx->config.pmo.force_pstate_method_value = in_dc->debug.dml21_force_pstate_method_value;
+               for (int i = 0; i < MAX_PIPES; i++)
+                       dml_ctx->config.pmo.force_pstate_method_values[i] = in_dc->debug.dml21_force_pstate_method_values[i];
        } else {
                dml_ctx->config.pmo.force_pstate_method_enable = false;
        }
 
        struct socbb_ip_params_external *external_socbb_ip_params;
        struct {
                bool force_pstate_method_enable;
-               enum dml2_force_pstate_methods force_pstate_method_value;
+               enum dml2_force_pstate_methods force_pstate_method_values[MAX_PIPES];
        } pmo;
        bool map_dc_pipes_with_callbacks;