struct {
                struct nvkm_gpuobj *inst;
-               struct nvkm_vma vma;
+               struct nvkm_vma *vma;
        } engn[NVKM_SUBDEV_NR];
 };
 
 
 
        struct {
                struct nvkm_gpuobj *inst;
-               struct nvkm_vma vma;
+               struct nvkm_vma *vma;
        } engn[NVKM_SUBDEV_NR];
 };
 
 
 #include <core/enum.h>
 #include <core/gpuobj.h>
 #include <subdev/bar.h>
-#include <subdev/fb.h>
 #include <engine/sw.h>
 
 #include <nvif/class.h>
        if (ret)
                return ret;
 
-       ret = nvkm_vm_get(bar, nvkm_memory_size(fifo->user.mem), 12,
-                         NV_MEM_ACCESS_RW, &fifo->user.bar);
+       ret = nvkm_vmm_get(bar, 12, nvkm_memory_size(fifo->user.mem),
+                          &fifo->user.bar);
        if (ret)
                return ret;
 
-       return nvkm_memory_map(fifo->user.mem, 0, bar, &fifo->user.bar, NULL, 0);
+       return nvkm_memory_map(fifo->user.mem, 0, bar, fifo->user.bar, NULL, 0);
 }
 
 static void
        }
 
        nvkm_mask(device, 0x002200, 0x00000001, 0x00000001);
-       nvkm_wr32(device, 0x002254, 0x10000000 | fifo->user.bar.offset >> 12);
+       nvkm_wr32(device, 0x002254, 0x10000000 | fifo->user.bar->addr >> 12);
 
        nvkm_wr32(device, 0x002100, 0xffffffff);
        nvkm_wr32(device, 0x002140, 0x7fffffff);
 gf100_fifo_dtor(struct nvkm_fifo *base)
 {
        struct gf100_fifo *fifo = gf100_fifo(base);
-       nvkm_vm_put(&fifo->user.bar);
+       struct nvkm_device *device = fifo->base.engine.subdev.device;
+       nvkm_vmm_put(nvkm_bar_bar1_vmm(device), &fifo->user.bar);
        nvkm_memory_unref(&fifo->user.mem);
        nvkm_memory_unref(&fifo->runlist.mem[0]);
        nvkm_memory_unref(&fifo->runlist.mem[1]);
 
 
        struct {
                struct nvkm_memory *mem;
-               struct nvkm_vma bar;
+               struct nvkm_vma *bar;
        } user;
 };
 
 
 #include <core/client.h>
 #include <core/gpuobj.h>
 #include <subdev/bar.h>
-#include <subdev/fb.h>
 #include <subdev/timer.h>
 #include <subdev/top.h>
 #include <engine/sw.h>
        if (ret)
                return ret;
 
-       ret = nvkm_vm_get(bar, nvkm_memory_size(fifo->user.mem), 12,
-                         NV_MEM_ACCESS_RW, &fifo->user.bar);
+       ret = nvkm_vmm_get(bar, 12, nvkm_memory_size(fifo->user.mem),
+                          &fifo->user.bar);
        if (ret)
                return ret;
 
-       return nvkm_memory_map(fifo->user.mem, 0, bar, &fifo->user.bar, NULL, 0);
+       return nvkm_memory_map(fifo->user.mem, 0, bar, fifo->user.bar, NULL, 0);
 }
 
 static void
                nvkm_wr32(device, 0x04014c + (i * 0x2000), 0xffffffff); /* INTREN */
        }
 
-       nvkm_wr32(device, 0x002254, 0x10000000 | fifo->user.bar.offset >> 12);
+       nvkm_wr32(device, 0x002254, 0x10000000 | fifo->user.bar->addr >> 12);
 
        nvkm_wr32(device, 0x002100, 0xffffffff);
        nvkm_wr32(device, 0x002140, 0x7fffffff);
 gk104_fifo_dtor(struct nvkm_fifo *base)
 {
        struct gk104_fifo *fifo = gk104_fifo(base);
+       struct nvkm_device *device = fifo->base.engine.subdev.device;
        int i;
 
-       nvkm_vm_put(&fifo->user.bar);
+       nvkm_vmm_put(nvkm_bar_bar1_vmm(device), &fifo->user.bar);
        nvkm_memory_unref(&fifo->user.mem);
 
        for (i = 0; i < fifo->runlist_nr; i++) {
 
 
        struct {
                struct nvkm_memory *mem;
-               struct nvkm_vma bar;
+               struct nvkm_vma *bar;
        } user;
 };
 
 
        struct nvkm_gpuobj *inst = chan->base.inst;
 
        if (offset) {
-               u64 addr = chan->engn[engine->subdev.index].vma.offset;
+               u64 addr = chan->engn[engine->subdev.index].vma->addr;
                nvkm_kmap(inst);
                nvkm_wo32(inst, offset + 0x00, lower_32_bits(addr) | 4);
                nvkm_wo32(inst, offset + 0x04, upper_32_bits(addr));
                              struct nvkm_engine *engine)
 {
        struct gf100_fifo_chan *chan = gf100_fifo_chan(base);
-       struct nvkm_vma *vma = &chan->engn[engine->subdev.index].vma;
-       if (vma->vm) {
-               nvkm_vm_unmap(vma);
-               nvkm_vm_put(vma);
-       }
+       nvkm_vmm_put(chan->base.vmm, &chan->engn[engine->subdev.index].vma);
        nvkm_gpuobj_del(&chan->engn[engine->subdev.index].inst);
 }
 
        if (ret)
                return ret;
 
-       ret = nvkm_vm_get(chan->base.vmm, chan->engn[engn].inst->size, 12,
-                         NV_MEM_ACCESS_RW, &chan->engn[engn].vma);
+       ret = nvkm_vmm_get(chan->base.vmm, 12, chan->engn[engn].inst->size,
+                          &chan->engn[engn].vma);
        if (ret)
                return ret;
 
        return nvkm_memory_map(chan->engn[engn].inst, 0, chan->base.vmm,
-                              &chan->engn[engn].vma, NULL, 0);
+                              chan->engn[engn].vma, NULL, 0);
 }
 
 static void
                                  (1ULL << NVKM_ENGINE_MSPPP) |
                                  (1ULL << NVKM_ENGINE_MSVLD) |
                                  (1ULL << NVKM_ENGINE_SW),
-                                 1, fifo->user.bar.offset, 0x1000,
+                                 1, fifo->user.bar->addr, 0x1000,
                                  oclass, &chan->base);
        if (ret)
                return ret;
 
        u32 offset = gk104_fifo_gpfifo_engine_addr(engine);
 
        if (offset) {
-               u64   addr = chan->engn[engine->subdev.index].vma.offset;
+               u64   addr = chan->engn[engine->subdev.index].vma->addr;
                u32 datalo = lower_32_bits(addr) | 0x00000004;
                u32 datahi = upper_32_bits(addr);
                nvkm_kmap(inst);
                              struct nvkm_engine *engine)
 {
        struct gk104_fifo_chan *chan = gk104_fifo_chan(base);
-       struct nvkm_vma *vma = &chan->engn[engine->subdev.index].vma;
-       if (vma->vm) {
-               nvkm_vm_unmap(vma);
-               nvkm_vm_put(vma);
-       }
+       nvkm_vmm_put(chan->base.vmm, &chan->engn[engine->subdev.index].vma);
        nvkm_gpuobj_del(&chan->engn[engine->subdev.index].inst);
 }
 
        if (ret)
                return ret;
 
-       ret = nvkm_vm_get(chan->base.vmm, chan->engn[engn].inst->size, 12,
-                         NV_MEM_ACCESS_RW, &chan->engn[engn].vma);
+       ret = nvkm_vmm_get(chan->base.vmm, 12, chan->engn[engn].inst->size,
+                          &chan->engn[engn].vma);
        if (ret)
                return ret;
 
        return nvkm_memory_map(chan->engn[engn].inst, 0, chan->base.vmm,
-                              &chan->engn[engn].vma, NULL, 0);
+                              chan->engn[engn].vma, NULL, 0);
 }
 
 static void
 
        ret = nvkm_fifo_chan_ctor(&gk104_fifo_gpfifo_func, &fifo->base,
                                  0x1000, 0x1000, true, vm, 0, subdevs,
-                                 1, fifo->user.bar.offset, 0x200,
+                                 1, fifo->user.bar->addr, 0x200,
                                  oclass, &chan->base);
        if (ret)
                return ret;