Do some minor tidy-up.
Signed-off-by: Xiang Chen <chenxiang66@hisilicon.com>
Signed-off-by: John Garry <john.garry@huawei.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
                id->initiator_bits = SAS_PROTOCOL_ALL;
                id->target_bits = phy->identify.target_port_protocols;
        } else if (phy->phy_type & PORT_TYPE_SATA) {
-               /*Nothing*/
+               /* Nothing */
        }
 
        sas_phy->frame_rcvd_size = phy->frame_rcvd_size;
        struct hisi_hba *hisi_hba = dev_to_hisi_hba(device);
        struct device *dev = hisi_hba->dev;
        struct hisi_sas_tmf_task tmf_task;
-       int rc = TMF_RESP_FUNC_FAILED;
+       int rc;
 
        rc = hisi_sas_internal_task_abort(hisi_hba, device,
                                          HISI_SAS_INT_ABT_DEV, 0);
 
                if (device_property_read_u32(dev, "ctrl-reset-reg",
                                             &hisi_hba->ctrl_reset_reg)) {
-                       dev_err(dev,
-                               "could not get property ctrl-reset-reg\n");
+                       dev_err(dev, "could not get property ctrl-reset-reg\n");
                        return -ENOENT;
                }
 
                if (device_property_read_u32(dev, "ctrl-reset-sts-reg",
                                             &hisi_hba->ctrl_reset_sts_reg)) {
-                       dev_err(dev,
-                               "could not get property ctrl-reset-sts-reg\n");
+                       dev_err(dev, "could not get property ctrl-reset-sts-reg\n");
                        return -ENOENT;
                }
 
                if (device_property_read_u32(dev, "ctrl-clock-ena-reg",
                                             &hisi_hba->ctrl_clock_ena_reg)) {
-                       dev_err(dev,
-                               "could not get property ctrl-clock-ena-reg\n");
+                       dev_err(dev, "could not get property ctrl-clock-ena-reg\n");
                        return -ENOENT;
                }
        }
 
                for (j = 0; j < HISI_SAS_PHY_INT_NR; j++, idx++) {
                        irq = platform_get_irq(pdev, idx);
                        if (!irq) {
-                               dev_err(dev,
-                                       "irq init: fail map phy interrupt %d\n",
+                               dev_err(dev, "irq init: fail map phy interrupt %d\n",
                                        idx);
                                return -ENOENT;
                        }
                        rc = devm_request_irq(dev, irq, phy_interrupts[j], 0,
                                              DRV_NAME " phy", phy);
                        if (rc) {
-                               dev_err(dev, "irq init: could not request "
-                                       "phy interrupt %d, rc=%d\n",
+                               dev_err(dev, "irq init: could not request phy interrupt %d, rc=%d\n",
                                        irq, rc);
                                return -ENOENT;
                        }
                rc = devm_request_irq(dev, irq, fatal_interrupts[i], 0,
                                      DRV_NAME " fatal", hisi_hba);
                if (rc) {
-                       dev_err(dev,
-                               "irq init: could not request fatal interrupt %d, rc=%d\n",
+                       dev_err(dev, "irq init: could not request fatal interrupt %d, rc=%d\n",
                                irq, rc);
                        return -ENOENT;
                }
 
                        slot_err_v2_hw(hisi_hba, task, slot, 2);
 
                if (ts->stat != SAS_DATA_UNDERRUN)
-                       dev_info(dev, "erroneous completion iptt=%d task=%p dev id=%d "
-                               "CQ hdr: 0x%x 0x%x 0x%x 0x%x "
-                               "Error info: 0x%x 0x%x 0x%x 0x%x\n",
-                               slot->idx, task, sas_dev->device_id,
-                               complete_hdr->dw0, complete_hdr->dw1,
-                               complete_hdr->act, complete_hdr->dw3,
-                               error_info[0], error_info[1],
-                               error_info[2], error_info[3]);
+                       dev_info(dev, "erroneous completion iptt=%d task=%p dev id=%d CQ hdr: 0x%x 0x%x 0x%x 0x%x Error info: 0x%x 0x%x 0x%x 0x%x\n",
+                                slot->idx, task, sas_dev->device_id,
+                                complete_hdr->dw0, complete_hdr->dw1,
+                                complete_hdr->act, complete_hdr->dw3,
+                                error_info[0], error_info[1],
+                                error_info[2], error_info[3]);
 
                if (unlikely(slot->abort))
                        return ts->stat;
                spin_lock_irqsave(&device->done_lock, flags);
                if (test_bit(SAS_HA_FROZEN, &ha->state)) {
                        spin_unlock_irqrestore(&device->done_lock, flags);
-                       dev_info(dev, "slot complete: task(%p) ignored\n ",
+                       dev_info(dev, "slot complete: task(%p) ignored\n",
                                 task);
                        return sts;
                }
 
                        if (irq_value2 & BIT(CHL_INT2_SL_IDAF_TOUT_CONF_OFF)) {
                                dev_warn(dev, "phy%d identify timeout\n",
-                                               phy_no);
+                                        phy_no);
                                hisi_sas_notify_phy_event(phy,
                                                HISI_PHYE_LINK_RESET);
                        }
        { .msk = BIT(5), .msg = "SATA_AXI_R_ERR" },
        { .msk = BIT(6), .msg = "DQE_AXI_R_ERR" },
        { .msk = BIT(7), .msg = "CQE_AXI_W_ERR" },
-       {},
+       {}
 };
 
 static const struct hisi_sas_hw_error fifo_error[] = {
        { .msk = BIT(10), .msg = "GETDQE_FIFO" },
        { .msk = BIT(11), .msg = "CMDP_FIFO" },
        { .msk = BIT(12), .msg = "AWTCTRL_FIFO" },
-       {},
+       {}
 };
 
 static const struct hisi_sas_hw_error fatal_axi_errors[] = {
                                if (!(err_value & sub->msk))
                                        continue;
                                dev_err(dev, "%s (0x%x) found!\n",
-                                        sub->msg, irq_value);
+                                       sub->msg, irq_value);
                                queue_work(hisi_hba->wq, &hisi_hba->rst_work);
                        }
                } else {
                        dev_err(dev, "%s (0x%x) found!\n",
-                                axi_error->msg, irq_value);
+                               axi_error->msg, irq_value);
                        queue_work(hisi_hba->wq, &hisi_hba->rst_work);
                }
        }
        /* check ERR bit of Status Register */
        if (fis->status & ATA_ERR) {
                dev_warn(dev, "sata int: phy%d FIS status: 0x%x\n", phy_no,
-                               fis->status);
+                        fis->status);
                hisi_sas_notify_phy_event(phy, HISI_PHYE_LINK_RESET);
                res = IRQ_NONE;
                goto end;
                rc = devm_request_irq(dev, irq, phy_interrupts[i], 0,
                                      DRV_NAME " phy", hisi_hba);
                if (rc) {
-                       dev_err(dev, "irq init: could not request "
-                               "phy interrupt %d, rc=%d\n",
+                       dev_err(dev, "irq init: could not request phy interrupt %d, rc=%d\n",
                                irq, rc);
                        rc = -ENOENT;
                        goto free_phy_int_irqs;
                rc = devm_request_irq(dev, irq, sata_int_v2_hw, 0,
                                      DRV_NAME " sata", phy);
                if (rc) {
-                       dev_err(dev, "irq init: could not request "
-                               "sata interrupt %d, rc=%d\n",
+                       dev_err(dev, "irq init: could not request sata interrupt %d, rc=%d\n",
                                irq, rc);
                        rc = -ENOENT;
                        goto free_sata_int_irqs;
                rc = devm_request_irq(dev, irq, fatal_interrupts[fatal_no], 0,
                                      DRV_NAME " fatal", hisi_hba);
                if (rc) {
-                       dev_err(dev,
-                               "irq init: could not request fatal interrupt %d, rc=%d\n",
+                       dev_err(dev, "irq init: could not request fatal interrupt %d, rc=%d\n",
                                irq, rc);
                        rc = -ENOENT;
                        goto free_fatal_int_irqs;
                rc = devm_request_irq(dev, irq, cq_interrupt_v2_hw, 0,
                                      DRV_NAME " cq", cq);
                if (rc) {
-                       dev_err(dev,
-                               "irq init: could not request cq interrupt %d, rc=%d\n",
+                       dev_err(dev, "irq init: could not request cq interrupt %d, rc=%d\n",
                                irq, rc);
                        rc = -ENOENT;
                        goto free_cq_int_irqs;
                break;
        default:
                dev_err(dev, "write gpio: unsupported or bad reg type %d\n",
-                               reg_type);
+                       reg_type);
                return -EINVAL;
        }
 
 
                                DLVRY_Q_0_RD_PTR + (queue * 0x14));
        if (r == (w+1) % HISI_SAS_QUEUE_SLOTS) {
                dev_warn(dev, "full queue=%d r=%d w=%d\n",
-                               queue, r, w);
+                        queue, r, w);
                return -EAGAIN;
        }
 
        { .msk = BIT(5), .msg = "SATA_AXI_R_ERR" },
        { .msk = BIT(6), .msg = "DQE_AXI_R_ERR" },
        { .msk = BIT(7), .msg = "CQE_AXI_W_ERR" },
-       {},
+       {}
 };
 
 static const struct hisi_sas_hw_error fifo_error[] = {
        { .msk = BIT(10), .msg = "GETDQE_FIFO" },
        { .msk = BIT(11), .msg = "CMDP_FIFO" },
        { .msk = BIT(12), .msg = "AWTCTRL_FIFO" },
-       {},
+       {}
 };
 
 static const struct hisi_sas_hw_error fatal_axi_error[] = {
 
                slot_err_v3_hw(hisi_hba, task, slot);
                if (ts->stat != SAS_DATA_UNDERRUN)
-                       dev_info(dev, "erroneous completion iptt=%d task=%p dev id=%d "
-                               "CQ hdr: 0x%x 0x%x 0x%x 0x%x "
-                               "Error info: 0x%x 0x%x 0x%x 0x%x\n",
-                               slot->idx, task, sas_dev->device_id,
-                               dw0, dw1, complete_hdr->act, dw3,
-                               error_info[0], error_info[1],
-                               error_info[2], error_info[3]);
+                       dev_info(dev, "erroneous completion iptt=%d task=%p dev id=%d CQ hdr: 0x%x 0x%x 0x%x 0x%x Error info: 0x%x 0x%x 0x%x 0x%x\n",
+                                slot->idx, task, sas_dev->device_id,
+                                dw0, dw1, complete_hdr->act, dw3,
+                                error_info[0], error_info[1],
+                                error_info[2], error_info[3]);
                if (unlikely(slot->abort))
                        return ts->stat;
                goto out;
                                      cq_interrupt_v3_hw, irqflags,
                                      DRV_NAME " cq", cq);
                if (rc) {
-                       dev_err(dev,
-                               "could not request cq%d interrupt, rc=%d\n",
+                       dev_err(dev, "could not request cq%d interrupt, rc=%d\n",
                                i, rc);
                        rc = -ENOENT;
                        goto free_cq_irqs;
                break;
        default:
                dev_err(dev, "write gpio: unsupported or bad reg type %d\n",
-                               reg_type);
+                       reg_type);
                return -EINVAL;
        }
 
 
        hisi_hba->regs = pcim_iomap(pdev, 5, 0);
        if (!hisi_hba->regs) {
-               dev_err(dev, "cannot map register.\n");
+               dev_err(dev, "cannot map register\n");
                rc = -ENOMEM;
                goto err_out_ha;
        }
        pci_power_t device_state = pdev->current_state;
 
        dev_warn(dev, "resuming from operating state [D%d]\n",
-                       device_state);
+                device_state);
        pci_set_power_state(pdev, PCI_D0);
        pci_enable_wake(pdev, PCI_D0, 0);
        pci_restore_state(pdev);