card->sw_caps.sd3_drv_type |= SD_DRIVER_TYPE_C;
                        if (data & SDIO_DRIVE_SDTD)
                                card->sw_caps.sd3_drv_type |= SD_DRIVER_TYPE_D;
+
+                       ret = mmc_io_rw_direct(card, 0, 0, SDIO_CCCR_INTERRUPT_EXT, 0, &data);
+                       if (ret)
+                               goto out;
+
+                       if (data & SDIO_INTERRUPT_EXT_SAI) {
+                               data |= SDIO_INTERRUPT_EXT_EAI;
+                               ret = mmc_io_rw_direct(card, 1, 0, SDIO_CCCR_INTERRUPT_EXT,
+                                                      data, NULL);
+                               if (ret)
+                                       goto out;
+
+                               card->cccr.enable_async_irq = 1;
+                       }
                }
 
                /* if no uhs mode ensure we check for high speed */
 
                                wide_bus:1,
                                high_power:1,
                                high_speed:1,
-                               disable_cd:1;
+                               disable_cd:1,
+                               enable_async_irq:1;
 };
 
 struct sdio_cis {
        return card->ext_csd.data_sector_size == 4096;
 }
 
+static inline int mmc_card_enable_async_irq(struct mmc_card *card)
+{
+       return card->cccr.enable_async_irq;
+}
+
 bool mmc_card_is_blockaddr(struct mmc_card *card);
 
 #define mmc_card_mmc(c)                ((c)->type == MMC_TYPE_MMC)
 
 #define  SDIO_DTSx_SET_TYPE_A  (1 << SDIO_DRIVE_DTSx_SHIFT)
 #define  SDIO_DTSx_SET_TYPE_C  (2 << SDIO_DRIVE_DTSx_SHIFT)
 #define  SDIO_DTSx_SET_TYPE_D  (3 << SDIO_DRIVE_DTSx_SHIFT)
+
+#define SDIO_CCCR_INTERRUPT_EXT        0x16
+#define SDIO_INTERRUPT_EXT_SAI (1 << 0)
+#define SDIO_INTERRUPT_EXT_EAI (1 << 1)
+
 /*
  * Function Basic Registers (FBR)
  */