drm/amd/powerplay: implement power1_cap and power1_cap_max interface for SMU11 (v2)

add get_power_limit and set_power_limit functions
to support hwmon for SMU11.

v2: fix the code style issue.

Signed-off-by: Chengming Gui <Jack.Gui@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Kevin Wang <kevin1.wang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
index d140b3dce6763469d5f891c1254ebcdff03b6fb0..c3508a7c8bfd07db3d9413c0efe16dc595e9935d 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
@@ -1761,7 +1761,10 @@ static ssize_t amdgpu_hwmon_show_power_cap_max(struct device *dev,
        struct amdgpu_device *adev = dev_get_drvdata(dev);
        uint32_t limit = 0;
 
-       if (adev->powerplay.pp_funcs && adev->powerplay.pp_funcs->get_power_limit) {
+       if (is_support_sw_smu(adev)) {
+               smu_get_power_limit(&adev->smu, &limit, true);
+               return snprintf(buf, PAGE_SIZE, "%u\n", limit * 1000000);
+       } else if (adev->powerplay.pp_funcs && adev->powerplay.pp_funcs->get_power_limit) {
                adev->powerplay.pp_funcs->get_power_limit(adev->powerplay.pp_handle, &limit, true);
                return snprintf(buf, PAGE_SIZE, "%u\n", limit * 1000000);
        } else {
@@ -1776,7 +1779,10 @@ static ssize_t amdgpu_hwmon_show_power_cap(struct device *dev,
        struct amdgpu_device *adev = dev_get_drvdata(dev);
        uint32_t limit = 0;
 
-       if (adev->powerplay.pp_funcs && adev->powerplay.pp_funcs->get_power_limit) {
+       if (is_support_sw_smu(adev)) {
+               smu_get_power_limit(&adev->smu, &limit, false);
+               return snprintf(buf, PAGE_SIZE, "%u\n", limit * 1000000);
+       } else if (adev->powerplay.pp_funcs && adev->powerplay.pp_funcs->get_power_limit) {
                adev->powerplay.pp_funcs->get_power_limit(adev->powerplay.pp_handle, &limit, false);
                return snprintf(buf, PAGE_SIZE, "%u\n", limit * 1000000);
        } else {
@@ -1799,7 +1805,9 @@ static ssize_t amdgpu_hwmon_set_power_cap(struct device *dev,
                return err;
 
        value = value / 1000000; /* convert to Watt */
-       if (adev->powerplay.pp_funcs && adev->powerplay.pp_funcs->set_power_limit) {
+       if (is_support_sw_smu(adev)) {
+               adev->smu.funcs->set_power_limit(&adev->smu, value);
+       } else if (adev->powerplay.pp_funcs && adev->powerplay.pp_funcs->set_power_limit) {
                err = adev->powerplay.pp_funcs->set_power_limit(adev->powerplay.pp_handle, value);
                if (err)
                        return err;

diff --git a/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c b/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c
index ed2f7ccd2fb5ca600ad543719fa2f2d12f5b1089..ed2d1996455eee2715cef110085e3a00a046a898 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c
+++ b/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c
@@ -619,7 +619,7 @@ static int smu_smc_table_hw_init(struct smu_context *smu)
        if (ret)
                return ret;
 
-       ret = smu_get_power_limit(smu);
+       ret = smu_get_power_limit(smu, &smu->default_power_limit, false);
        if (ret)
                return ret;
 

diff --git a/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h b/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h
index 2cc7129b53aa144b44e05b75c3c6be7ce9e4523e..d49bdee76f0ea7de025d9eb7fa7fb84078aed5fb 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h
+++ b/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h
@@ -484,7 +484,8 @@ struct smu_funcs
        int (*disable_all_mask)(struct smu_context *smu);
        int (*update_feature_enable_state)(struct smu_context *smu, uint32_t feature_id, bool enabled);
        int (*notify_display_change)(struct smu_context *smu);
-       int (*get_power_limit)(struct smu_context *smu);
+       int (*get_power_limit)(struct smu_context *smu, uint32_t *limit, bool def);
+       int (*set_power_limit)(struct smu_context *smu, uint32_t n);
        int (*get_current_clk_freq)(struct smu_context *smu, uint32_t clk_id, uint32_t *value);
        int (*init_max_sustainable_clocks)(struct smu_context *smu);
        int (*start_thermal_control)(struct smu_context *smu);
@@ -619,8 +620,10 @@ struct smu_funcs
        ((smu)->ppt_funcs->set_default_od8_settings ? (smu)->ppt_funcs->set_default_od8_settings((smu)) : 0)
 #define smu_update_specified_od8_value(smu, index, value) \
        ((smu)->ppt_funcs->update_specified_od8_value ? (smu)->ppt_funcs->update_specified_od8_value((smu), (index), (value)) : 0)
-#define smu_get_power_limit(smu) \
-       ((smu)->funcs->get_power_limit? (smu)->funcs->get_power_limit((smu)) : 0)
+#define smu_get_power_limit(smu, limit, def) \
+       ((smu)->funcs->get_power_limit ? (smu)->funcs->get_power_limit((smu), (limit), (def)) : 0)
+#define smu_set_power_limit(smu, limit) \
+       ((smu)->funcs->set_power_limit ? (smu)->funcs->set_power_limit((smu), (limit)) : 0)
 #define smu_get_current_clk_freq(smu, clk_id, value) \
        ((smu)->funcs->get_current_clk_freq? (smu)->funcs->get_current_clk_freq((smu), (clk_id), (value)) : 0)
 #define smu_print_clk_levels(smu, type, buf) \

diff --git a/drivers/gpu/drm/amd/powerplay/smu_v11_0.c b/drivers/gpu/drm/amd/powerplay/smu_v11_0.c
index 6333c185385c660a9dea7b2b871e70ba13ef80d9..aee8d27a5473a7493c4817aa5237899fc111194e 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/smu_v11_0.c
+++ b/drivers/gpu/drm/amd/powerplay/smu_v11_0.c
@@ -873,23 +873,42 @@ static int smu_v11_0_init_max_sustainable_clocks(struct smu_context *smu)
        return 0;
 }
 
-static int smu_v11_0_get_power_limit(struct smu_context *smu)
+static int smu_v11_0_get_power_limit(struct smu_context *smu,
+                                    uint32_t *limit,
+                                    bool get_default)
 {
-       int ret;
-       uint32_t power_limit_value;
+       int ret = 0;
 
-       ret = smu_send_smc_msg_with_param(smu,
-                       SMU_MSG_GetPptLimit,
-                       POWER_SOURCE_AC << 16);
+       if (get_default) {
+               mutex_lock(&smu->mutex);
+               *limit = smu->default_power_limit;
+               mutex_unlock(&smu->mutex);
+       } else {
+               ret = smu_send_smc_msg_with_param(smu, SMU_MSG_GetPptLimit,
+                                                 POWER_SOURCE_AC << 16);
+               if (ret) {
+                       pr_err("[%s] get PPT limit failed!", __func__);
+                       return ret;
+               }
+               smu_read_smc_arg(smu, limit);
+               smu->power_limit = *limit;
+       }
+
+       return ret;
+}
+
+static int smu_v11_0_set_power_limit(struct smu_context *smu, uint32_t n)
+{
+       int ret = 0;
+
+       if (smu_feature_is_enabled(smu, FEATURE_PPT_BIT))
+               ret = smu_send_smc_msg_with_param(smu, SMU_MSG_SetPptLimit, n);
        if (ret) {
-               pr_err("[GetPptLimit] get default PPT limit failed!");
+               pr_err("[%s] Set power limit Failed!", __func__);
                return ret;
        }
 
-       smu_read_smc_arg(smu, &power_limit_value);
-       smu->power_limit = smu->default_power_limit = power_limit_value;
-
-       return 0;
+       return ret;
 }
 
 static int smu_v11_0_get_current_clk_freq(struct smu_context *smu, uint32_t clk_id, uint32_t *value)
@@ -1760,6 +1779,7 @@ static const struct smu_funcs smu_v11_0_funcs = {
        .update_feature_enable_state = smu_v11_0_update_feature_enable_state,
        .notify_display_change = smu_v11_0_notify_display_change,
        .get_power_limit = smu_v11_0_get_power_limit,
+       .set_power_limit = smu_v11_0_set_power_limit,
        .get_current_clk_freq = smu_v11_0_get_current_clk_freq,
        .init_max_sustainable_clocks = smu_v11_0_init_max_sustainable_clocks,
        .start_thermal_control = smu_v11_0_start_thermal_control,