to->nested_ctl          = from->nested_ctl;
        to->event_inj           = from->event_inj;
        to->event_inj_err       = from->event_inj_err;
+       to->next_rip            = from->next_rip;
        to->nested_cr3          = from->nested_cr3;
        to->virt_ext            = from->virt_ext;
        to->pause_filter_count  = from->pause_filter_count;
        }
 }
 
-static void nested_vmcb02_prepare_control(struct vcpu_svm *svm)
+static void nested_vmcb02_prepare_control(struct vcpu_svm *svm,
+                                         unsigned long vmcb12_rip)
 {
        u32 int_ctl_vmcb01_bits = V_INTR_MASKING_MASK;
        u32 int_ctl_vmcb12_bits = V_TPR_MASK | V_IRQ_INJECTION_BITS_MASK;
        vmcb02->control.event_inj           = svm->nested.ctl.event_inj;
        vmcb02->control.event_inj_err       = svm->nested.ctl.event_inj_err;
 
+       /*
+        * next_rip is consumed on VMRUN as the return address pushed on the
+        * stack for injected soft exceptions/interrupts.  If nrips is exposed
+        * to L1, take it verbatim from vmcb12.  If nrips is supported in
+        * hardware but not exposed to L1, stuff the actual L2 RIP to emulate
+        * what a nrips=0 CPU would do (L1 is responsible for advancing RIP
+        * prior to injecting the event).
+        */
+       if (svm->nrips_enabled)
+               vmcb02->control.next_rip    = svm->nested.ctl.next_rip;
+       else if (boot_cpu_has(X86_FEATURE_NRIPS))
+               vmcb02->control.next_rip    = vmcb12_rip;
+
        vmcb02->control.virt_ext            = vmcb01->control.virt_ext &
                                              LBR_CTL_ENABLE_MASK;
        if (svm->lbrv_enabled)
        nested_svm_copy_common_state(svm->vmcb01.ptr, svm->nested.vmcb02.ptr);
 
        svm_switch_vmcb(svm, &svm->nested.vmcb02);
-       nested_vmcb02_prepare_control(svm);
+       nested_vmcb02_prepare_control(svm, vmcb12->save.rip);
        nested_vmcb02_prepare_save(svm, vmcb12);
 
        ret = nested_svm_load_cr3(&svm->vcpu, svm->nested.save.cr3,
        dst->nested_ctl           = from->nested_ctl;
        dst->event_inj            = from->event_inj;
        dst->event_inj_err        = from->event_inj_err;
+       dst->next_rip             = from->next_rip;
        dst->nested_cr3           = from->nested_cr3;
        dst->virt_ext              = from->virt_ext;
        dst->pause_filter_count   = from->pause_filter_count;
        nested_copy_vmcb_control_to_cache(svm, ctl);
 
        svm_switch_vmcb(svm, &svm->nested.vmcb02);
-       nested_vmcb02_prepare_control(svm);
+       nested_vmcb02_prepare_control(svm, svm->vmcb->save.rip);
 
        /*
         * While the nested guest CR3 is already checked and set by