.prod_num = PORT_SWITCH_ID_PROD_NUM_6123,
                .family = MV88E6XXX_FAMILY_6165,
                .name = "Marvell 88E6123",
+               .num_ports = 3,
        }, {
                .prod_num = PORT_SWITCH_ID_PROD_NUM_6161,
                .family = MV88E6XXX_FAMILY_6165,
                .name = "Marvell 88E6161",
+               .num_ports = 6,
        }, {
                .prod_num = PORT_SWITCH_ID_PROD_NUM_6165,
                .family = MV88E6XXX_FAMILY_6165,
                .name = "Marvell 88E6165",
+               .num_ports = 6,
        }
 };
 
 
 static int mv88e6123_setup(struct dsa_switch *ds)
 {
-       struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);
        int ret;
 
        ret = mv88e6xxx_setup_common(ds);
        if (ret < 0)
                return ret;
 
-       switch (ps->id) {
-       case PORT_SWITCH_ID_6123:
-               ps->num_ports = 3;
-               break;
-       case PORT_SWITCH_ID_6161:
-       case PORT_SWITCH_ID_6165:
-               ps->num_ports = 6;
-               break;
-       default:
-               return -ENODEV;
-       }
-
        ret = mv88e6xxx_switch_reset(ds, false);
        if (ret < 0)
                return ret;
 
                .prod_num = PORT_SWITCH_ID_PROD_NUM_6095,
                .family = MV88E6XXX_FAMILY_6095,
                .name = "Marvell 88E6095/88E6095F",
+               .num_ports = 11,
        }, {
                .prod_num = PORT_SWITCH_ID_PROD_NUM_6085,
                .family = MV88E6XXX_FAMILY_6097,
                .name = "Marvell 88E6085",
+               .num_ports = 10,
        }, {
                .prod_num = PORT_SWITCH_ID_PROD_NUM_6131,
                .family = MV88E6XXX_FAMILY_6185,
                .name = "Marvell 88E6131",
+               .num_ports = 8,
        }, {
                .prod_num = PORT_SWITCH_ID_PROD_NUM_6185,
                .family = MV88E6XXX_FAMILY_6185,
                .name = "Marvell 88E6185",
+               .num_ports = 10,
        }
 };
 
 
 static int mv88e6131_setup(struct dsa_switch *ds)
 {
-       struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);
        int ret;
 
        ret = mv88e6xxx_setup_common(ds);
 
        mv88e6xxx_ppu_state_init(ds);
 
-       switch (ps->id) {
-       case PORT_SWITCH_ID_6085:
-       case PORT_SWITCH_ID_6185:
-               ps->num_ports = 10;
-               break;
-       case PORT_SWITCH_ID_6095:
-               ps->num_ports = 11;
-               break;
-       case PORT_SWITCH_ID_6131:
-               ps->num_ports = 8;
-               break;
-       default:
-               return -ENODEV;
-       }
-
        ret = mv88e6xxx_switch_reset(ds, false);
        if (ret < 0)
                return ret;
 {
        struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);
 
-       if (port >= 0 && port < ps->num_ports)
+       if (port >= 0 && port < ps->info->num_ports)
                return port;
 
        return -EINVAL;
 
                .prod_num = PORT_SWITCH_ID_PROD_NUM_6171,
                .family = MV88E6XXX_FAMILY_6351,
                .name = "Marvell 88E6171",
+               .num_ports = 7,
        }, {
                .prod_num = PORT_SWITCH_ID_PROD_NUM_6175,
                .family = MV88E6XXX_FAMILY_6351,
                .name = "Marvell 88E6175",
+               .num_ports = 7,
        }, {
                .prod_num = PORT_SWITCH_ID_PROD_NUM_6350,
                .family = MV88E6XXX_FAMILY_6351,
                .name = "Marvell 88E6350",
+               .num_ports = 7,
        }, {
                .prod_num = PORT_SWITCH_ID_PROD_NUM_6351,
                .family = MV88E6XXX_FAMILY_6351,
                .name = "Marvell 88E6351",
+               .num_ports = 7,
        }
 };
 
 
 static int mv88e6171_setup(struct dsa_switch *ds)
 {
-       struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);
        int ret;
 
        ret = mv88e6xxx_setup_common(ds);
        if (ret < 0)
                return ret;
 
-       ps->num_ports = 7;
-
        ret = mv88e6xxx_switch_reset(ds, true);
        if (ret < 0)
                return ret;
 
                .prod_num = PORT_SWITCH_ID_PROD_NUM_6320,
                .family = MV88E6XXX_FAMILY_6320,
                .name = "Marvell 88E6320",
+               .num_ports = 7,
        }, {
                .prod_num = PORT_SWITCH_ID_PROD_NUM_6321,
                .family = MV88E6XXX_FAMILY_6320,
                .name = "Marvell 88E6321",
+               .num_ports = 7,
        }, {
                .prod_num = PORT_SWITCH_ID_PROD_NUM_6172,
                .family = MV88E6XXX_FAMILY_6352,
                .name = "Marvell 88E6172",
+               .num_ports = 7,
        }, {
                .prod_num = PORT_SWITCH_ID_PROD_NUM_6176,
                .family = MV88E6XXX_FAMILY_6352,
                .name = "Marvell 88E6176",
+               .num_ports = 7,
        }, {
                .prod_num = PORT_SWITCH_ID_PROD_NUM_6240,
                .family = MV88E6XXX_FAMILY_6352,
                .name = "Marvell 88E6240",
+               .num_ports = 7,
        }, {
                .prod_num = PORT_SWITCH_ID_PROD_NUM_6352,
                .family = MV88E6XXX_FAMILY_6352,
                .name = "Marvell 88E6352",
+               .num_ports = 7,
        }
 };
 
        if (ret < 0)
                return ret;
 
-       ps->num_ports = 7;
-
        mutex_init(&ps->eeprom_mutex);
 
        ret = mv88e6xxx_switch_reset(ds, true);
 
                reg |= PORT_PCS_CTRL_DUPLEX_FULL;
 
        if ((mv88e6xxx_6352_family(ds) || mv88e6xxx_6351_family(ds)) &&
-           (port >= ps->num_ports - 2)) {
+           (port >= ps->info->num_ports - 2)) {
                if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID)
                        reg |= PORT_PCS_CTRL_RGMII_DELAY_RXCLK;
                if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID)
 {
        struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);
        struct net_device *bridge = ps->ports[port].bridge_dev;
-       const u16 mask = (1 << ps->num_ports) - 1;
+       const u16 mask = (1 << ps->info->num_ports) - 1;
        u16 output_ports = 0;
        int reg;
        int i;
        if (dsa_is_cpu_port(ds, port) || dsa_is_dsa_port(ds, port)) {
                output_ports = mask;
        } else {
-               for (i = 0; i < ps->num_ports; ++i) {
+               for (i = 0; i < ps->info->num_ports; ++i) {
                        /* allow sending frames to every group member */
                        if (bridge && ps->ports[i].bridge_dev == bridge)
                                output_ports |= BIT(i);
                regs[i] = ret;
        }
 
-       for (i = 0; i < ps->num_ports; ++i) {
+       for (i = 0; i < ps->info->num_ports; ++i) {
                unsigned int shift = (i % 4) * 4 + nibble_offset;
                u16 reg = regs[i / 4];
 
        int i;
        int ret;
 
-       for (i = 0; i < ps->num_ports; ++i) {
+       for (i = 0; i < ps->info->num_ports; ++i) {
                unsigned int shift = (i % 4) * 4 + nibble_offset;
                u8 data = entry->data[i];
 
        bitmap_zero(fid_bitmap, MV88E6XXX_N_FID);
 
        /* Set every FID bit used by the (un)bridged ports */
-       for (i = 0; i < ps->num_ports; ++i) {
+       for (i = 0; i < ps->info->num_ports; ++i) {
                err = _mv88e6xxx_port_fid_get(ds, i, fid);
                if (err)
                        return err;
                return err;
 
        /* exclude all ports except the CPU and DSA ports */
-       for (i = 0; i < ps->num_ports; ++i)
+       for (i = 0; i < ps->info->num_ports; ++i)
                vlan.data[i] = dsa_is_cpu_port(ds, i) || dsa_is_dsa_port(ds, i)
                        ? GLOBAL_VTU_DATA_MEMBER_TAG_UNMODIFIED
                        : GLOBAL_VTU_DATA_MEMBER_TAG_NON_MEMBER;
                if (vlan.vid > vid_end)
                        break;
 
-               for (i = 0; i < ps->num_ports; ++i) {
+               for (i = 0; i < ps->info->num_ports; ++i) {
                        if (dsa_is_dsa_port(ds, i) || dsa_is_cpu_port(ds, i))
                                continue;
 
 
        /* keep the VLAN unless all ports are excluded */
        vlan.valid = false;
-       for (i = 0; i < ps->num_ports; ++i) {
+       for (i = 0; i < ps->info->num_ports; ++i) {
                if (dsa_is_cpu_port(ds, i) || dsa_is_dsa_port(ds, i))
                        continue;
 
        mutex_lock(&ps->smi_mutex);
 
        /* Get or create the bridge FID and assign it to the port */
-       for (i = 0; i < ps->num_ports; ++i)
+       for (i = 0; i < ps->info->num_ports; ++i)
                if (ps->ports[i].bridge_dev == bridge)
                        break;
 
-       if (i < ps->num_ports)
+       if (i < ps->info->num_ports)
                err = _mv88e6xxx_port_fid_get(ds, i, &fid);
        else
                err = _mv88e6xxx_fid_new(ds, &fid);
        /* Assign the bridge and remap each port's VLANTable */
        ps->ports[port].bridge_dev = bridge;
 
-       for (i = 0; i < ps->num_ports; ++i) {
+       for (i = 0; i < ps->info->num_ports; ++i) {
                if (ps->ports[i].bridge_dev == bridge) {
                        err = _mv88e6xxx_port_based_vlan_map(ds, i);
                        if (err)
        /* Unassign the bridge and remap each port's VLANTable */
        ps->ports[port].bridge_dev = NULL;
 
-       for (i = 0; i < ps->num_ports; ++i)
+       for (i = 0; i < ps->info->num_ports; ++i)
                if (i == port || ps->ports[i].bridge_dev == bridge)
                        if (_mv88e6xxx_port_based_vlan_map(ds, i))
                                netdev_warn(ds->ports[i], "failed to remap\n");
 
        mutex_lock(&ps->smi_mutex);
 
-       for (port = 0; port < ps->num_ports; ++port)
+       for (port = 0; port < ps->info->num_ports; ++port)
                if (test_and_clear_bit(port, ps->port_state_update_mask) &&
                    _mv88e6xxx_port_state(ds, port, ps->ports[port].state))
                        netdev_warn(ds->ports[port], "failed to update state to %s\n",
        int ret;
        int i;
 
-       for (i = 0; i < ps->num_ports; i++) {
+       for (i = 0; i < ps->info->num_ports; i++) {
                ret = mv88e6xxx_setup_port(ds, i);
                if (ret < 0)
                        return ret;
                err = _mv88e6xxx_reg_write(ds, REG_GLOBAL2, GLOBAL2_TRUNK_MASK,
                                           0x8000 |
                                           (i << GLOBAL2_TRUNK_MASK_NUM_SHIFT) |
-                                          ((1 << ps->num_ports) - 1));
+                                          ((1 << ps->info->num_ports) - 1));
                if (err)
                        goto unlock;
        }
                 * ingress rate limit registers to their initial
                 * state.
                 */
-               for (i = 0; i < ps->num_ports; i++) {
+               for (i = 0; i < ps->info->num_ports; i++) {
                        err = _mv88e6xxx_reg_write(ds, REG_GLOBAL2,
                                                   GLOBAL2_INGRESS_OP,
                                                   0x9000 | (i << 8));
        mutex_lock(&ps->smi_mutex);
 
        /* Set all ports to the disabled state. */
-       for (i = 0; i < ps->num_ports; i++) {
+       for (i = 0; i < ps->info->num_ports; i++) {
                ret = _mv88e6xxx_reg_read(ds, REG_PORT(i), PORT_CONTROL);
                if (ret < 0)
                        goto unlock;
 {
        struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);
 
-       if (port >= 0 && port < ps->num_ports)
+       if (port >= 0 && port < ps->info->num_ports)
                return port;
        return -EINVAL;
 }