return PTR_ERR(encoder);
                }
 
-               priv->encoders[priv->num_encoders++] = encoder;
-
                memset(&info, 0, sizeof(info));
                info.intf_type = encoder->encoder_type;
 
                        return rc;
                }
 
-               priv->encoders[priv->num_encoders++] = encoder;
-
                info.num_of_h_tiles = 1;
                info.h_tile_instance[0] = i;
                info.capabilities = MSM_DISPLAY_CAP_VID_MODE;
        return rc;
 }
 
+#define MAX_PLANES 20
 static int _dpu_kms_drm_obj_init(struct dpu_kms *dpu_kms)
 {
        struct drm_device *dev;
        struct drm_plane *cursor_planes[MAX_PLANES] = { NULL };
        struct drm_crtc *crtc;
        struct drm_encoder *encoder;
+       unsigned int num_encoders;
 
        struct msm_drm_private *priv;
        struct dpu_mdss_cfg *catalog;
        if (ret)
                return ret;
 
-       max_crtc_count = min(catalog->mixer_count, priv->num_encoders);
+       num_encoders = 0;
+       drm_for_each_encoder(encoder, dev)
+               num_encoders++;
+
+       max_crtc_count = min(catalog->mixer_count, num_encoders);
 
        /* Create the planes, keeping track of one primary/cursor per crtc */
        for (i = 0; i < catalog->sspp_count; i++) {
                        ret = PTR_ERR(plane);
                        return ret;
                }
-               priv->planes[priv->num_planes++] = plane;
 
                if (type == DRM_PLANE_TYPE_CURSOR)
                        cursor_planes[cursor_planes_idx++] = plane;
 
                        return PTR_ERR(connector);
                }
 
-               priv->encoders[priv->num_encoders++] = encoder;
-               priv->connectors[priv->num_connectors++] = connector;
-
                break;
        case DRM_MODE_ENCODER_TMDS:
                encoder = mdp4_dtv_encoder_init(dev);
                        }
                }
 
-               priv->encoders[priv->num_encoders++] = encoder;
-
                break;
        case DRM_MODE_ENCODER_DSI:
                /* only DSI1 supported for now */
 
                /* TODO: Add DMA_S later? */
                encoder->possible_crtcs = 1 << DMA_P;
-               priv->encoders[priv->num_encoders++] = encoder;
 
                ret = msm_dsi_modeset_init(priv->dsi[dsi_id], dev, encoder);
                if (ret) {
                        ret = PTR_ERR(plane);
                        goto fail;
                }
-               priv->planes[priv->num_planes++] = plane;
        }
 
        for (i = 0; i < ARRAY_SIZE(mdp4_crtcs); i++) {
 
                                             struct mdp5_ctl *ctl)
 {
        struct drm_device *dev = mdp5_kms->dev;
-       struct msm_drm_private *priv = dev->dev_private;
        struct drm_encoder *encoder;
 
        encoder = mdp5_encoder_init(dev, intf, ctl);
                return encoder;
        }
 
-       priv->encoders[priv->num_encoders++] = encoder;
-
        return encoder;
 }
 
        struct drm_plane *primary[MAX_BASES] = { NULL };
        struct drm_plane *cursor[MAX_BASES] = { NULL };
        struct drm_encoder *encoder;
+       unsigned int num_encoders;
 
        /*
         * Construct encoders and modeset initialize connector devices
                        goto fail;
        }
 
+       num_encoders = 0;
+       drm_for_each_encoder(encoder, dev)
+               num_encoders++;
+
        /*
         * We should ideally have less number of encoders (set up by parsing
         * the MDP5 interfaces) than the number of layer mixers present in HW,
         * but let's be safe here anyway
         */
-       num_crtcs = min(priv->num_encoders, mdp5_kms->num_hwmixers);
+       num_crtcs = min(num_encoders, mdp5_kms->num_hwmixers);
 
        /*
         * Construct planes equaling the number of hw pipes, and CRTCs for the
                        DRM_DEV_ERROR(dev->dev, "failed to construct plane %d (%d)\n", i, ret);
                        goto fail;
                }
-               priv->planes[priv->num_planes++] = plane;
 
                if (type == DRM_PLANE_TYPE_PRIMARY)
                        primary[pi++] = plane;
 
 
        dp_priv->panel->connector = dp_display->connector;
 
-       priv->connectors[priv->num_connectors++] = dp_display->connector;
-
        dp_display->bridge = msm_dp_bridge_init(dp_display, dev, encoder);
        if (IS_ERR(dp_display->bridge)) {
                ret = PTR_ERR(dp_display->bridge);
 
        }
 
        priv->bridges[priv->num_bridges++]       = msm_dsi->bridge;
-       priv->connectors[priv->num_connectors++] = msm_dsi->connector;
 
        return 0;
 fail:
 
        }
 
        priv->bridges[priv->num_bridges++]       = hdmi->bridge;
-       priv->connectors[priv->num_connectors++] = hdmi->connector;
 
        platform_set_drvdata(pdev, hdmi);
 
 
 struct msm_disp_state;
 
 #define MAX_CRTCS      8
-#define MAX_PLANES     20
-#define MAX_ENCODERS   8
 #define MAX_BRIDGES    8
-#define MAX_CONNECTORS 8
 
 #define FRAC_16_16(mult, div)    (((mult) << 16) / (div))
 
 
        struct workqueue_struct *wq;
 
-       unsigned int num_planes;
-       struct drm_plane *planes[MAX_PLANES];
-
        unsigned int num_crtcs;
        struct drm_crtc *crtcs[MAX_CRTCS];
 
        struct msm_drm_thread event_thread[MAX_CRTCS];
 
-       unsigned int num_encoders;
-       struct drm_encoder *encoders[MAX_ENCODERS];
-
        unsigned int num_bridges;
        struct drm_bridge *bridges[MAX_BRIDGES];
 
-       unsigned int num_connectors;
-       struct drm_connector *connectors[MAX_CONNECTORS];
-
        /* Properties */
        struct drm_property *plane_property[PLANE_PROP_MAX_NUM];