net: atlantic: add support for FW 4.x

This patch adds support for FW 4.x, which is about to get into the
production for some products.
4.x is mostly compatible with 3.x, save for soft reset, which requires
the acquisition of 2 additional semaphores.
Other differences (e.g. absence of PTP support) are handled via
capabilities.

Note: 4.x targets specific products only. 3.x is still the main firmware
branch, which should be used by most users (at least for now).

Signed-off-by: Dmitry Bogdanov <dbogdanov@marvell.com>
Signed-off-by: Mark Starovoytov <mstarovoitov@marvell.com>
Signed-off-by: Igor Russkikh <irusskikh@marvell.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

diff --git a/drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_llh.c b/drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_llh.c
index d775b23025c16a8d74a18364d9f2d92f5a113d25..9c3debae425fc42abfb624677154effbb3e20be5 100644 (file)
--- a/drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_llh.c
+++ b/drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_llh.c
@@ -1,7 +1,8 @@
 // SPDX-License-Identifier: GPL-2.0-only
-/*
- * aQuantia Corporation Network Driver
- * Copyright (C) 2014-2019 aQuantia Corporation. All rights reserved
+/* Atlantic Network Driver
+ *
+ * Copyright (C) 2014-2019 aQuantia Corporation
+ * Copyright (C) 2019-2020 Marvell International Ltd.
  */
 
 /* File hw_atl_llh.c: Definitions of bitfield and register access functions for
@@ -1724,6 +1725,16 @@ u32 hw_atl_sem_mdio_get(struct aq_hw_s *self)
        return hw_atl_reg_glb_cpu_sem_get(self, HW_ATL_FW_SM_MDIO);
 }
 
+u32 hw_atl_sem_reset1_get(struct aq_hw_s *self)
+{
+       return hw_atl_reg_glb_cpu_sem_get(self, HW_ATL_FW_SM_RESET1);
+}
+
+u32 hw_atl_sem_reset2_get(struct aq_hw_s *self)
+{
+       return hw_atl_reg_glb_cpu_sem_get(self, HW_ATL_FW_SM_RESET2);
+}
+
 u32 hw_atl_scrpad_get(struct aq_hw_s *aq_hw, u32 scratch_scp)
 {
        return aq_hw_read_reg(aq_hw,

diff --git a/drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_llh.h b/drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_llh.h
index 61a6f70c51cd9b8c15ccd5d410bbd5dc0214fa7e..f0954711df24c06854a53b3c5d47a0bf68ddf77f 100644 (file)
--- a/drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_llh.h
+++ b/drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_llh.h
@@ -1,7 +1,8 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/*
- * aQuantia Corporation Network Driver
- * Copyright (C) 2014-2019 aQuantia Corporation. All rights reserved
+/* Atlantic Network Driver
+ *
+ * Copyright (C) 2014-2019 aQuantia Corporation
+ * Copyright (C) 2019-2020 Marvell International Ltd.
  */
 
 /* File hw_atl_llh.h: Declarations of bitfield and register access functions for
@@ -838,6 +839,9 @@ u32 hw_atl_sem_ram_get(struct aq_hw_s *self);
 /* get global microprocessor mdio semaphore */
 u32 hw_atl_sem_mdio_get(struct aq_hw_s *self);
 
+u32 hw_atl_sem_reset1_get(struct aq_hw_s *self);
+u32 hw_atl_sem_reset2_get(struct aq_hw_s *self);
+
 /* get global microprocessor scratch pad register */
 u32 hw_atl_scrpad_get(struct aq_hw_s *aq_hw, u32 scratch_scp);
 

diff --git a/drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_llh_internal.h b/drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_llh_internal.h
index 7430ff025134129d0c1fefe8d7655c05acb72b7e..ee11cb88325e5a729a95b67940d6b5b2482facc8 100644 (file)
--- a/drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_llh_internal.h
+++ b/drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_llh_internal.h
@@ -1,7 +1,8 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/*
- * aQuantia Corporation Network Driver
- * Copyright (C) 2014-2019 aQuantia Corporation. All rights reserved
+/* Atlantic Network Driver
+ *
+ * Copyright (C) 2014-2019 aQuantia Corporation
+ * Copyright (C) 2019-2020 Marvell International Ltd.
  */
 
 /* File hw_atl_llh_internal.h: Preprocessor definitions
@@ -2837,7 +2838,11 @@
 /* Default value of bitfield MDIO Address [F:0] */
 #define HW_ATL_MDIO_ADDRESS_DEFAULT 0x0
 
+#define HW_ATL_MIF_RESET_TIMEOUT_ADR 0x00000348
+
 #define HW_ATL_FW_SM_MDIO       0x0U
 #define HW_ATL_FW_SM_RAM        0x2U
+#define HW_ATL_FW_SM_RESET1     0x3U
+#define HW_ATL_FW_SM_RESET2     0x4U
 
 #endif /* HW_ATL_LLH_INTERNAL_H */

diff --git a/drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_utils.c b/drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_utils.c
index 22f68e4a638c8c85d13fffe22a9d65580a6acb04..cacab3352cb8e2e70dfd2831f67ed0a691e2396e 100644 (file)
--- a/drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_utils.c
+++ b/drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_utils.c
@@ -46,6 +46,7 @@
 #define HW_ATL_FW_VER_1X 0x01050006U
 #define HW_ATL_FW_VER_2X 0x02000000U
 #define HW_ATL_FW_VER_3X 0x03000000U
+#define HW_ATL_FW_VER_4X 0x04000000U
 
 #define FORCE_FLASHLESS 0
 
@@ -78,6 +79,8 @@ int hw_atl_utils_initfw(struct aq_hw_s *self, const struct aq_fw_ops **fw_ops)
                *fw_ops = &aq_fw_2x_ops;
        } else if (hw_atl_utils_ver_match(HW_ATL_FW_VER_3X, self->fw_ver_actual)) {
                *fw_ops = &aq_fw_2x_ops;
+       } else if (hw_atl_utils_ver_match(HW_ATL_FW_VER_4X, self->fw_ver_actual)) {
+               *fw_ops = &aq_fw_2x_ops;
        } else {
                aq_pr_err("Bad FW version detected: %x\n",
                          self->fw_ver_actual);
@@ -236,6 +239,7 @@ static int hw_atl_utils_soft_reset_rbl(struct aq_hw_s *self)
 
 int hw_atl_utils_soft_reset(struct aq_hw_s *self)
 {
+       int ver = hw_atl_utils_get_fw_version(self);
        u32 boot_exit_code = 0;
        u32 val;
        int k;
@@ -256,14 +260,12 @@ int hw_atl_utils_soft_reset(struct aq_hw_s *self)
 
        self->rbl_enabled = (boot_exit_code != 0);
 
-       /* FW 1.x may bootup in an invalid POWER state (WOL feature).
-        * We should work around this by forcing its state back to DEINIT
-        */
-       if (hw_atl_utils_ver_match(HW_ATL_FW_VER_1X,
-                                  aq_hw_read_reg(self,
-                                                 HW_ATL_MPI_FW_VERSION))) {
+       if (hw_atl_utils_ver_match(HW_ATL_FW_VER_1X, ver)) {
                int err = 0;
 
+               /* FW 1.x may bootup in an invalid POWER state (WOL feature).
+                * We should work around this by forcing its state back to DEINIT
+                */
                hw_atl_utils_mpi_set_state(self, MPI_DEINIT);
                err = readx_poll_timeout_atomic(hw_atl_utils_mpi_get_state,
                                                self, val,
@@ -272,6 +274,27 @@ int hw_atl_utils_soft_reset(struct aq_hw_s *self)
                                                10, 10000U);
                if (err)
                        return err;
+       } else if (hw_atl_utils_ver_match(HW_ATL_FW_VER_4X, ver)) {
+               u64 sem_timeout = aq_hw_read_reg(self, HW_ATL_MIF_RESET_TIMEOUT_ADR);
+
+               /* Acquire 2 semaphores before issuing reset for FW 4.x */
+               if (sem_timeout > 3000)
+                       sem_timeout = 3000;
+               sem_timeout = sem_timeout * 1000;
+
+               if (sem_timeout != 0) {
+                       int err;
+
+                       err = readx_poll_timeout_atomic(hw_atl_sem_reset1_get, self, val,
+                                                       val == 1U, 1U, sem_timeout);
+                       if (err)
+                               aq_pr_err("reset sema1 timeout");
+
+                       err = readx_poll_timeout_atomic(hw_atl_sem_reset2_get, self, val,
+                                                       val == 1U, 1U, sem_timeout);
+                       if (err)
+                               aq_pr_err("reset sema2 timeout");
+               }
        }
 
        if (self->rbl_enabled)