break;
                }
        }
-       r100_irq_set(rdev);
+       if (rdev->irq.installed)
+               r100_irq_set(rdev);
 }
 
 void r100_hpd_fini(struct radeon_device *rdev)
 {
        uint32_t tmp = 0;
 
+       if (!rdev->irq.installed) {
+               WARN(1, "Can't enable IRQ/MSI because no handler is installed.\n");
+               WREG32(R_000040_GEN_INT_CNTL, 0);
+               return -EINVAL;
+       }
        if (rdev->irq.sw_int) {
                tmp |= RADEON_SW_INT_ENABLE;
        }
 
                        }
                }
        }
-       r600_irq_set(rdev);
+       if (rdev->irq.installed)
+               r600_irq_set(rdev);
 }
 
 void r600_hpd_fini(struct radeon_device *rdev)
        u32 mode_int = 0;
        u32 hpd1, hpd2, hpd3, hpd4 = 0, hpd5 = 0, hpd6 = 0;
 
+       if (!rdev->irq.installed) {
+               WARN(1, "Can't enable IRQ/MSI because no handler is installed.\n");
+               return -EINVAL;
+       }
        /* don't enable anything if the ih is disabled */
        if (!rdev->ih.enabled)
                return 0;
 
        rdev->irq.sw_int = false;
        for (i = 0; i < 2; i++) {
                rdev->irq.crtc_vblank_int[i] = false;
+               rdev->irq.hpd[i] = false;
        }
        radeon_irq_set(rdev);
 }
                        DRM_INFO("radeon: using MSI.\n");
                }
        }
-       drm_irq_install(rdev->ddev);
        rdev->irq.installed = true;
+       r = drm_irq_install(rdev->ddev);
+       if (r) {
+               rdev->irq.installed = false;
+               return r;
+       }
        DRM_INFO("radeon: irq initialized.\n");
        return 0;
 }
 
 void radeon_irq_kms_fini(struct radeon_device *rdev)
 {
+       drm_vblank_cleanup(rdev->ddev);
        if (rdev->irq.installed) {
-               rdev->irq.installed = false;
                drm_irq_uninstall(rdev->ddev);
+               rdev->irq.installed = false;
                if (rdev->msi_enabled)
                        pci_disable_msi(rdev->pdev);
        }
 
                        break;
                }
        }
-       rs600_irq_set(rdev);
+       if (rdev->irq.installed)
+               rs600_irq_set(rdev);
 }
 
 void rs600_hpd_fini(struct radeon_device *rdev)
        u32 hpd2 = RREG32(R_007D18_DC_HOT_PLUG_DETECT2_INT_CONTROL) &
                ~S_007D18_DC_HOT_PLUG_DETECT2_INT_EN(1);
 
+       if (!rdev->irq.installed) {
+               WARN(1, "Can't enable IRQ/MSI because no handler is installed.\n");
+               WREG32(R_000040_GEN_INT_CNTL, 0);
+               return -EINVAL;
+       }
        if (rdev->irq.sw_int) {
                tmp |= S_000040_SW_INT_EN(1);
        }