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ppc: Add a core_index to CPUPPCState for SMT vCPUs
authorNicholas Piggin <npiggin@gmail.com>
Thu, 16 May 2024 05:25:12 +0000 (15:25 +1000)
committerNicholas Piggin <npiggin@gmail.com>
Thu, 25 Jul 2024 23:21:06 +0000 (09:21 +1000)
commitfeb37fdc821242d86c30bff33abd31bcce01e9e2
tree562c7a39dc97f5ad612cbf480913f2bf06088852tree
parent25de28220cedadac15021ec40047785f30e153fecommit | diff
ppc: Add a core_index to CPUPPCState for SMT vCPUs

The way SMT thread siblings are matched is clunky, using hard-coded
logic that checks the PIR SPR.

Change that to use a new core_index variable in the CPUPPCState,
where all siblings have the same core_index. CPU realize routines have
flexibility in setting core/sibling topology.

Reviewed-by: Cédric Le Goater <clg@redhat.com>
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
hw/ppc/pnv_core.c diff | blob | history
hw/ppc/spapr_cpu_core.c diff | blob | history
target/ppc/cpu.h diff | blob | history
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