]> www.infradead.org Git - users/dwmw2/linux.git/commit
irqchip: or1k-pic: Undefine mask_ack for level triggered hardware
authorStafford Horne <shorne@gmail.com>
Tue, 14 Jun 2022 23:54:26 +0000 (08:54 +0900)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Thu, 21 Jul 2022 19:20:17 +0000 (21:20 +0200)
commitfd830d8dd59a8040a9c3009c8d6e175c3f23637c
tree6cd76ce0add9f1b5390e2bb1a51dca9f670a680f
parentdae43b37925c7acead2ae0e4a1b64ec813c22321
irqchip: or1k-pic: Undefine mask_ack for level triggered hardware

[ Upstream commit 8520501346ed8d1c4a6dfa751cb57328a9c843f1 ]

The mask_ack operation clears the interrupt by writing to the PICSR
register.  This we don't want for level triggered interrupt because
it does not actually clear the interrupt on the source hardware.

This was causing issues in qemu with multi core setups where
interrupts would continue to fire even though they had been cleared in
PICSR.

Just remove the mask_ack operation.

Acked-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Stafford Horne <shorne@gmail.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
drivers/irqchip/irq-or1k-pic.c