]> www.infradead.org Git - users/jedix/linux-maple.git/commit
drm/xe/guc: Cache DSS info when creating capture register list
authorJohn Harrison <John.C.Harrison@Intel.com>
Thu, 17 Apr 2025 21:33:03 +0000 (14:33 -0700)
committerJohn Harrison <John.C.Harrison@Intel.com>
Tue, 22 Apr 2025 17:24:47 +0000 (10:24 -0700)
commitfa597710be6e6625b875d95c717f66b7ab83b986
tree89a4fbe12605a7b011a180ae4f47946ee5785e05
parent8393f3e155d902bd66c3033b073ec10d1409b2ee
drm/xe/guc: Cache DSS info when creating capture register list

Calculating the DSS id (index of a steered register) currently
requires reading state from the hwconfig table and that currently
requires dynamically allocating memory. The GuC based register capture
(for dev core dumps) includes this index as part of the register name
in the dump. However, it was calculating said index at the time of the
dump for every dump. That is wasteful. It also breaks anyone trying to
do the dump at a time when memory allocations are not allowed.

So rather than calculating on every print, just calculate at start of
day when creating the register list in the first place.

Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://lore.kernel.org/r/20250417213303.3021243-1-John.C.Harrison@Intel.com
drivers/gpu/drm/xe/xe_guc_capture.c
drivers/gpu/drm/xe/xe_guc_capture_types.h