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x86/cpu: Properly parse CPUID leaf 0x2 TLB descriptor 0x63
authorAhmed S. Darwish <darwi@linutronix.de>
Tue, 4 Mar 2025 08:51:14 +0000 (09:51 +0100)
committerIngo Molnar <mingo@kernel.org>
Tue, 4 Mar 2025 08:59:14 +0000 (09:59 +0100)
commitf6bdaab79ee4228a143ee1b4cb80416d6ffc0c63
tree5022b5e363990f1f9c31dce3c4a51f70314af609
parent1881148215c67151b146450fb89ec22fd92337a7
x86/cpu: Properly parse CPUID leaf 0x2 TLB descriptor 0x63

CPUID leaf 0x2's one-byte TLB descriptors report the number of entries
for specific TLB types, among other properties.

Typically, each emitted descriptor implies the same number of entries
for its respective TLB type(s).  An emitted 0x63 descriptor is an
exception: it implies 4 data TLB entries for 1GB pages and 32 data TLB
entries for 2MB or 4MB pages.

For the TLB descriptors parsing code, the entry count for 1GB pages is
encoded at the intel_tlb_table[] mapping, but the 2MB/4MB entry count is
totally ignored.

Update leaf 0x2's parsing logic 0x2 to account for 32 data TLB entries
for 2MB/4MB pages implied by the 0x63 descriptor.

Fixes: e0ba94f14f74 ("x86/tlb_info: get last level TLB entry number of CPU")
Signed-off-by: Ahmed S. Darwish <darwi@linutronix.de>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Cc: stable@kernel.org
Cc: "H. Peter Anvin" <hpa@zytor.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Link: https://lore.kernel.org/r/20250304085152.51092-4-darwi@linutronix.de
arch/x86/kernel/cpu/intel.c