]> www.infradead.org Git - users/willy/xarray.git/commit
drm/nouveau/fifo/tu102: Turing channel preemption fix
authorAlistair Popple <apopple@nvidia.com>
Fri, 30 Oct 2020 02:36:45 +0000 (13:36 +1100)
committerBen Skeggs <bskeggs@redhat.com>
Fri, 29 Jan 2021 06:49:13 +0000 (16:49 +1000)
commitf2fcb0692d6357f12f17a2f3fc3297ce6bab4e51
treecdf0bc8b545c808aa051d5e4affd5217e61b1312
parent26a0cfc163ab883bd4a5d7b6824bbfd0835e0e07
drm/nouveau/fifo/tu102: Turing channel preemption fix

Previous hardware allowed a MMU fault to be generated by software to
trigger a context switch for engine recovery. Turing has the capability
to preempt all work from a specific runlist processor and removed the
registers currently used for triggering MMU faults. Attempting to access
these non-existent registers results in further errors, so use the
runlist preemption register instead.

Signed-off-by: Alistair Popple <apopple@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
drivers/gpu/drm/nouveau/nvkm/engine/fifo/tu102.c