]> www.infradead.org Git - users/hch/configfs.git/commit
drm/amd/sriov: extend NV_MAILBOX_POLL_MSG_TIMEDOUT
authorVictor Zhao <Victor.Zhao@amd.com>
Wed, 7 Aug 2024 09:32:27 +0000 (17:32 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 13 Aug 2024 16:12:51 +0000 (12:12 -0400)
commitef6c2cb349c708676b7820c36a5beb75868ad544
treef4df4cdb929b6c12c31c0c95896e43a62bef2ec9
parentbbec7cea6fa4a0463d4766ed0e6bb347773d3949
drm/amd/sriov: extend NV_MAILBOX_POLL_MSG_TIMEDOUT

on MI300/MI308 UBB products, when doing mode1 reset, since 1 gpu need to
wait all 8 gpus finish mode1 reset and then do re-init. As observed,
sometimes the gpu which triggered the reset need to wait 15s for all
gpus to finish.

If poll msg timeout, guest driver will send the reset message again, and
may mess up the following reinit sequence on other gpus.

So extend the time to cover the maximum time needed to recover.

Signed-off-by: Victor Zhao <Victor.Zhao@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/mxgpu_nv.h