]> www.infradead.org Git - users/jedix/linux-maple.git/commit
drm/i915/dp: compute config for 128b/132b SST w/o DSC
authorJani Nikula <jani.nikula@intel.com>
Fri, 3 Jan 2025 13:52:39 +0000 (15:52 +0200)
committerJani Nikula <jani.nikula@intel.com>
Tue, 7 Jan 2025 16:44:26 +0000 (18:44 +0200)
commitef0a0757bbeac9aedff66464c6fba2d896cfe343
treeebeb30433127b0e8436944c43ad63ee58b68b8fe
parent79a6734cd56e70e22d557acbfc62ab36c835fa8f
drm/i915/dp: compute config for 128b/132b SST w/o DSC

Enable basic 128b/132b SST functionality without compression. Reuse
intel_dp_mtp_tu_compute_config() to figure out the TU after we've
determined we need to use an UHBR rate.

It's slightly complicated as the M/N computation is done in different
places in MST and SST paths, so we need to avoid trashing the values
later for UHBR.

If uncompressed UHBR fails, we drop to compressed non-UHBR, which is
quite likely to fail as well. We still lack 128b/132b SST+DSC.

We need mst_master_transcoder also for 128b/132b SST. Use cpu_transcoder
directly. Enhanced framing is "don't care" for 128b/132b link.

v2: mst_master_transcoder, enhanced framing (Imre)

Reviewed-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/084e4e05bf25a5dd396dd391014943d42b11c88d.1735912293.git.jani.nikula@intel.com
drivers/gpu/drm/i915/display/intel_dp.c