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target/riscv: machine: Sort the .subsections
authorBin Meng <bin.meng@windriver.com>
Sat, 30 Oct 2021 03:06:06 +0000 (11:06 +0800)
committerAlistair Francis <alistair.francis@wdc.com>
Wed, 17 Nov 2021 09:18:22 +0000 (19:18 +1000)
commitedcc4e4090ac56ea0d85ec482dd77bd7cc009b70
treeb7297e645ecc3c916135b6e275cdb9de138b86f9tree
parent8d5fcb1990bc64b62c0bc12121fe510940be5664commit | diff
target/riscv: machine: Sort the .subsections

Move the codes around so that the order of .subsections matches
the one they are referenced in vmstate_riscv_cpu.

Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-id: 20211030030606.32297-1-bmeng.cn@gmail.com
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
target/riscv/machine.c diff | blob | history
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