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perf/x86/intel: Update event constraints for ICX
authorKan Liang <kan.liang@linux.intel.com>
Tue, 28 Sep 2021 15:19:03 +0000 (08:19 -0700)
committerPeter Zijlstra <peterz@infradead.org>
Fri, 1 Oct 2021 11:57:54 +0000 (13:57 +0200)
commitecc2123e09f9e71ddc6c53d71e283b8ada685fe2
tree956ce3c4fd128e56f21b5677f29489d6d5f01bcetree
parent02d029a41dc986e2d5a77ecca45803857b346829commit | diff
perf/x86/intel: Update event constraints for ICX

According to the latest event list, the event encoding 0xEF is only
available on the first 4 counters. Add it into the event constraints
table.

Fixes: 6017608936c1 ("perf/x86/intel: Add Icelake support")
Signed-off-by: Kan Liang <kan.liang@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Link: https://lkml.kernel.org/r/1632842343-25862-1-git-send-email-kan.liang@linux.intel.com
arch/x86/events/intel/core.c diff | blob | history
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