]> www.infradead.org Git - nvme.git/commit
drm/i915/display/dp: Compute AS SDP when vrr is also enabled
authorMitul Golani <mitulkumar.ajitkumar.golani@intel.com>
Tue, 30 Jul 2024 04:09:40 +0000 (09:39 +0530)
committerAnkit Nautiyal <ankit.k.nautiyal@intel.com>
Tue, 30 Jul 2024 09:29:35 +0000 (14:59 +0530)
commiteb53e5b933b9ff315087305b3dc931af3067d19c
tree4f015ee32c523ade1391ae807c8d1252a553be4f
parent6f4e43a2f771b737d991142ec4f6d4b7ff31fbb4
drm/i915/display/dp: Compute AS SDP when vrr is also enabled

AS SDP should be computed when VRR timing generator is also enabled.
Correct the compute condition to compute params of Adaptive sync SDP
when VRR timing genrator is enabled along with sink support indication.

--v2:
Modify if condition (Jani).

Fixes: b2013783c445 ("drm/i915/display: Cache adpative sync caps to use it later")
Cc: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>
Cc: Arun R Murthy <arun.r.murthy@intel.com>
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Cc: intel-gfx@lists.freedesktop.org
Cc: intel-xe@lists.freedesktop.org
Signed-off-by: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>
Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
(added prefix drm in subject)
Link: https://patchwork.freedesktop.org/patch/msgid/20240730040941.396862-1-mitulkumar.ajitkumar.golani@intel.com
drivers/gpu/drm/i915/display/intel_dp.c