]> www.infradead.org Git - users/jedix/linux-maple.git/commit
riscv: misaligned: Add handling for ZCB instructions
authorNylon Chen <nylon.chen@sifive.com>
Fri, 11 Apr 2025 07:38:49 +0000 (15:38 +0800)
committerAlexandre Ghiti <alexghiti@rivosinc.com>
Mon, 5 May 2025 13:09:38 +0000 (13:09 +0000)
commiteb16b3727c05ed36420c90eca1e8f0e279514c1c
tree74d3c142dc62ef377ba598db29199cdedf19bf8d
parent92a09c47464d040866cf2b4cd052bc60555185fb
riscv: misaligned: Add handling for ZCB instructions

Add support for the Zcb extension's compressed half-word instructions
(C.LHU, C.LH, and C.SH) in the RISC-V misaligned access trap handler.

Signed-off-by: Zong Li <zong.li@sifive.com>
Signed-off-by: Nylon Chen <nylon.chen@sifive.com>
Fixes: 956d705dd279 ("riscv: Unaligned load/store handling for M_MODE")
Reviewed-by: Alexandre Ghiti <alexghiti@rivosinc.com>
Link: https://lore.kernel.org/r/20250411073850.3699180-2-nylon.chen@sifive.com
Signed-off-by: Alexandre Ghiti <alexghiti@rivosinc.com>
arch/riscv/kernel/traps_misaligned.c