]> www.infradead.org Git - users/jedix/linux-maple.git/commit
arm64: dts: rockchip: Fix PCIe3 handling for Edgeble-6TOPS Modules
authorJagan Teki <jagan@edgeble.ai>
Sat, 21 Dec 2024 15:17:58 +0000 (20:47 +0530)
committerHeiko Stuebner <heiko@sntech.de>
Wed, 8 Jan 2025 12:11:22 +0000 (13:11 +0100)
commite2ee8a440869281620fbcacdca6e13cbeebcc1be
tree6a47f278ceb2fee7b52f15f3d4c8b2d36ec34f31
parent9be4171219b659a8f0fa0a7913af2c6ab20c714e
arm64: dts: rockchip: Fix PCIe3 handling for Edgeble-6TOPS Modules

The Edgeble 6TOPS modules has configured the PCIe3.0 with
- 2 lanes on Port1 of pcie3x2 controller for M.2 M-Key
- 2 lanes on Port0 of pcie3x4 controller for B and E-Key

The, current DT uses opposite controller nodes that indeed uses
incorrect reset, regulator nodes.

The configuration also uses refclk oscillator that need to enable
explicitly in DT to avoid the probe hang on while reading DBI.

So, this patch fixes all these essential issues and make this PCIe work
properly.

Issues fixed are,
- Fix the associate controller nodes for M and B, E-Key
- Fix the reset gpio handlings
- Fix the regulator handlings and naming convensions
- Support pcie_refclk oscillator

Fixes: 92eaee21abbd ("arm64: dts: rockchip: Add Edgeble NCM6A-IO M.2 B-Key, E-Key")
Fixes: 5d85d4c7e03b ("arm64: dts: rockchip: Add Edgeble NCM6A-IO M.2 M-Key")
Reported-by: Mitchell Ma <machuang@radxa.com>
Co-developed-by: Mitchell Ma <machuang@radxa.com>
Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Link: https://lore.kernel.org/r/20241221151758.345257-1-jagan@edgeble.ai
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
arch/arm64/boot/dts/rockchip/rk3588-edgeble-neu6a-io.dtsi