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clk: xilinx: Optimize divisor search in clk_wzrd_get_divisors_ver()
authorShubhrajyoti Datta <shubhrajyoti.datta@amd.com>
Tue, 29 Jul 2025 05:08:42 +0000 (10:38 +0530)
committerStephen Boyd <sboyd@kernel.org>
Sun, 21 Sep 2025 17:56:21 +0000 (10:56 -0700)
commite0a94c6bb5b48c46ff4dd0533e79aacfda366b9f
tree1b0174d6020acd9ea1a1466339e70e7eb3cfa1e0tree
parent8f5ae30d69d7543eee0d70083daf4de8fe15d585commit | diff
clk: xilinx: Optimize divisor search in clk_wzrd_get_divisors_ver()

Optimise the clock wizard divisor calculation by eliminating the innermost
loop over output divider o. Earlier there was an error that is returned
if the WZRD_MIN_ERR is not achieved error is returned now it computes
the best possible frequency.

Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@amd.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
drivers/clk/xilinx/clk-xlnx-clock-wizard.c diff | blob | history
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