]> www.infradead.org Git - users/jedix/linux-maple.git/commit
drm/i915/dsb: Nuke the MMIO->indexed register write logic
authorVille Syrjälä <ville.syrjala@linux.intel.com>
Wed, 20 Nov 2024 16:41:22 +0000 (18:41 +0200)
committerVille Syrjälä <ville.syrjala@linux.intel.com>
Thu, 28 Nov 2024 15:44:39 +0000 (17:44 +0200)
commitda5bb8974c8a729aed4ce1c04fb582f13ddcb954
tree06136d5cda0d4a4852e3d370f272fcc96b8ba339
parent2504a316b35d49522f39cf0dc01830d7c36a9be4
drm/i915/dsb: Nuke the MMIO->indexed register write logic

We've determined that indexed DSB writes are only faster
than MMIO writes when writing the same register ~5 or more
times. That seems very unlikely to happen in any other case
than when using indexed LUT registers. Simplify the code
by removing the MMIO->indexed write conversion logic and
just emit the instruction as an indexed write from the get go.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20241120164123.12706-4-ville.syrjala@linux.intel.com
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
drivers/gpu/drm/i915/display/intel_dsb.c