]> www.infradead.org Git - users/jedix/linux-maple.git/commit
clk: analogbits: Fix incorrect calculation of vco rate delta
authorBo Gan <ganboing@gmail.com>
Fri, 30 Aug 2024 06:16:39 +0000 (23:16 -0700)
committerStephen Boyd <sboyd@kernel.org>
Thu, 16 Jan 2025 21:43:49 +0000 (13:43 -0800)
commitd7f12857f095ef38523399d47e68787b357232f6
tree08bf8d5b9ab3853dff41cf28e085fc56c1f60fb2
parentab9f0d04ffa9af09a8b0f44940df47c581f1cd00
clk: analogbits: Fix incorrect calculation of vco rate delta

In wrpll_configure_for_rate() we try to determine the best PLL
configuration for a target rate. However, in the loop where we try
values of R, we should compare the derived `vco` with `target_vco_rate`.
However, we were in fact comparing it with `target_rate`, which is
actually after Q shift. This is incorrect, and sometimes can result in
suboptimal clock rates. Fix it.

Fixes: 7b9487a9a5c4 ("clk: analogbits: add Wide-Range PLL library")
Signed-off-by: Bo Gan <ganboing@gmail.com>
Link: https://lore.kernel.org/r/20240830061639.2316-1-ganboing@gmail.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
drivers/clk/analogbits/wrpll-cln28hpc.c