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clk: renesas: r9a09g056: Add clock and reset entries for RIIC controllers
authorLad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Tue, 13 May 2025 15:46:33 +0000 (16:46 +0100)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Tue, 10 Jun 2025 08:20:45 +0000 (10:20 +0200)
commitd3c25dd1612da7ddf5857190e92b0c36d803c4d9
treeb4b1e083ad4c04a1f2a57235173fffb666ec396btree
parent82a0bc727cc2abd5fa6c4e63f0c303a9244a8ca0commit | diff
clk: renesas: r9a09g056: Add clock and reset entries for RIIC controllers

Add module clock and reset definitions for RIIC controllers 0-8, which
are available on the RZ/V2N (R9A09G056) SoC.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250513154635.273664-4-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
drivers/clk/renesas/r9a09g056-cpg.c diff | blob | history
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