]> www.infradead.org Git - users/jedix/linux-maple.git/commit
perf vendor events riscv: Rename U74 to Bullet
authorSamuel Holland <samuel.holland@sifive.com>
Thu, 13 Feb 2025 01:21:34 +0000 (17:21 -0800)
committerNamhyung Kim <namhyung@kernel.org>
Mon, 10 Mar 2025 21:15:37 +0000 (14:15 -0700)
commitd35ad7e881c7a47d9a4834434934df0fd8d54aec
treee21da48ffc169427e901a8c1963b3279a3ab48cd
parentc1a37db3cf6cb08be5150bd1401b2f584571ddb2
perf vendor events riscv: Rename U74 to Bullet

This set of PMU event descriptions applies not only to the SiFive U74
core configuration, but also to other SiFive cores that implement the
Bullet microarchitecture (such as U64, P270, and X280). Rename the
directory to be more generic.

Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
Reviewed-by: Ian Rogers <irogers@google.com>
Tested-by: Ian Rogers <irogers@google.com>
Tested-by: Atish Patra <atishp@rivosinc.com>
Link: https://lore.kernel.org/r/20250213220341.3215660-2-samuel.holland@sifive.com
Signed-off-by: Namhyung Kim <namhyung@kernel.org>
tools/perf/pmu-events/arch/riscv/mapfile.csv
tools/perf/pmu-events/arch/riscv/sifive/bullet/firmware.json [moved from tools/perf/pmu-events/arch/riscv/sifive/u74/firmware.json with 100% similarity]
tools/perf/pmu-events/arch/riscv/sifive/bullet/instruction.json [moved from tools/perf/pmu-events/arch/riscv/sifive/u74/instructions.json with 100% similarity]
tools/perf/pmu-events/arch/riscv/sifive/bullet/memory.json [moved from tools/perf/pmu-events/arch/riscv/sifive/u74/memory.json with 100% similarity]
tools/perf/pmu-events/arch/riscv/sifive/bullet/microarch.json [moved from tools/perf/pmu-events/arch/riscv/sifive/u74/microarch.json with 100% similarity]