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riscv: dts: allwinner: Add xtheadvector to the D1/D1s devicetree
authorCharlie Jenkins <charlie@rivosinc.com>
Thu, 14 Nov 2024 02:21:09 +0000 (18:21 -0800)
committerPalmer Dabbelt <palmer@rivosinc.com>
Sat, 18 Jan 2025 20:33:27 +0000 (12:33 -0800)
commitce1daeeba600a79b776864f12d19e799f1eb124f
treeabda455bebc29d1d834f5e41389e547957847c1atree
parentbf6279b38a4bbdb2954c3d159523d41367763a48commit | diff
riscv: dts: allwinner: Add xtheadvector to the D1/D1s devicetree

The D1/D1s SoCs support xtheadvector so it can be included in the
devicetree. Also include vlenb for the cpu.

Signed-off-by: Charlie Jenkins <charlie@rivosinc.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Tested-by: Yangyu Chen <cyy@cyyself.name>
Link: https://lore.kernel.org/r/20241113-xtheadvector-v11-3-236c22791ef9@rivosinc.com
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi diff | blob | history
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