SPARC64: Fix bad FP register calculation

SPARC64: Fix bad FP register calculation

An additional problem was found in handle_ldf_stq
after adding the fix for the SIGFPE on no-fault
load.  The calculation for freg is incorrect when
a single precision load is being handled. This
causes %f1 to be seen as %f32 etc, and the incorrect
register ends up being overwritten.  This code
sequence demonstrates the problem:
	ldd [%g1], %f32         ! g1 = valid address
	lda [%i3] ASI_PNF, %f1  ! i3 = invalid address
	std %f32, [%g1]		! %f32 is mangled
This is corrected by basing the freg calculation on
the load size.

Orabug: 24942761

Signed-off-by: Rob Gardner <rob.gardner@oracle.com>
Signed-off-by: Dave Kleikamp <dave.kleikamp@oracle.com>