x86/speculation: Implement per-cpu IBRS control

x86/speculation: Implement per-cpu IBRS control

If a system is booted with non-IBRS microcode, starts a microcode update
which enables IBRS, flags IBRS as supported, then an NMI is taken on a CPU
that hasn't actually received the update, we get a #GP since the SPEC_CTRL
MSR will get frobbed on the unsupported CPU anyway.

IBRS usage is now defined globally as well as per-cpu. The boot cpu defines
the initial IBRS usage, then each cpu defines its own per-cpu IBRS usage
based on the global IBRS uage and its cpu capabilities.

Signed-off-by: Alexandre Chartre <alexandre.chartre@oracle.com>
Reviewed-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
(cherry picked from UEK5 commit fabdd62357acce2531c9e16c5510e04862eab52d
 and part of UEK5 commit 5055b50f67b59ec07c64c833cb351f088486cb02)

[Backport: backport includes part of UEK5 commit 5055b50f67b59e
 ("x86/topology: Avoid wasting 128k for package id array") to track when
 cpu data are initialized.]

Orabug: 28064081

Signed-off-by: Alexandre Chartre <alexandre.chartre@oracle.com>
Reviewed-by: Darren Kenny <darren.kenny@oracle.com>
Signed-off-by: Brian Maly <brian.maly@oracle.com>