]> www.infradead.org Git - users/willy/xarray.git/commit
irqchip/riscv-intc: Fix use of AIA interrupts 32-63 on riscv32
authorSamuel Holland <samuel.holland@sifive.com>
Tue, 12 Mar 2024 21:28:08 +0000 (14:28 -0700)
committerThomas Gleixner <tglx@linutronix.de>
Fri, 15 Mar 2024 14:27:02 +0000 (15:27 +0100)
commitca5b0b717b75d0f86f7f5dfe18369781bec742ad
treed1f8f912e858b9dd50353b8e9227553a3ee3ddf1
parent4527e837801e76bbb196bb3b19375d8e43d636be
irqchip/riscv-intc: Fix use of AIA interrupts 32-63 on riscv32

riscv_intc_custom_base is initialized to BITS_PER_LONG, so the second
check passes even though AIA provides 64 interrupts. Adjust the condition to
only check the custom range for interrupts outside the standard range, and
adjust the standard range when AIA is available.

Fixes: 3c46fc5b5507 ("irqchip/riscv-intc: Add support for RISC-V AIA")
Fixes: 678c607ecf8a ("irqchip/riscv-intc: Fix low-level interrupt handler setup for AIA")
Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Anup Patel <anup@brainfault.org>
Link: https://lore.kernel.org/r/20240312212813.2323841-1-samuel.holland@sifive.com
drivers/irqchip/irq-riscv-intc.c