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clk: renesas: r9a08g045: Add clock, reset and power domain support for I2C
authorClaudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Tue, 25 Jun 2024 12:13:47 +0000 (15:13 +0300)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Thu, 27 Jun 2024 16:17:13 +0000 (18:17 +0200)
commitc7e58843d1e49a6b54d528a8ea34933cafb713f2
tree64d48efeb8d861ca6844976c70c256c9f3d50918tree
parent1f5ed3ae020a0624c9f51ed9720f8279bb0cae60commit | diff
clk: renesas: r9a08g045: Add clock, reset and power domain support for I2C

Add clock, reset and power domain support for the I2C channels available
on the Renesas RZ/G3S SoC.

Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20240625121358.590547-2-claudiu.beznea.uj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
drivers/clk/renesas/r9a08g045-cpg.c diff | blob | history
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