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crypto: amlogic - Fix endianness marker
authorHerbert Xu <herbert@gondor.apana.org.au>
Fri, 28 Aug 2020 07:18:33 +0000 (17:18 +1000)
committerHerbert Xu <herbert@gondor.apana.org.au>
Fri, 4 Sep 2020 07:57:17 +0000 (17:57 +1000)
commitc68e418c603f011ff0e7f4e1fb0f7edc48a04f7e
tree13aca88e42a6840760ec916b9a7dd0f61d9de557tree
parent8ea08ce08ff423be8501bc6edfae5b9dde18ae05commit | diff
crypto: amlogic - Fix endianness marker

The endianness marking on the variable v in meson_cipher is wrong.
It is actually in CPU-order, not little-endian.

This patch fixes it.

Fixes: 3d04158814e7 ("crypto: amlogic - enable working on big...")
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Acked-by: Corentin Labbe <clabbe@baylibre.com>
Tested-by: Corentin Labbe <clabbe@baylibre.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
drivers/crypto/amlogic/amlogic-gxl-cipher.c diff | blob | history
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