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(parent: 6e802db) | patch
target/arm: Enable FPSCR.QC bit for MVE
authorPeter Maydell <peter.maydell@linaro.org>
Mon, 14 Jun 2021 15:09:12 +0000 (16:09 +0100)
committerPeter Maydell <peter.maydell@linaro.org>
Wed, 16 Jun 2021 13:33:52 +0000 (14:33 +0100)
commitc485ce2c491a6e5d66da1d1555ecd474b450db98
treebbc6385c6f24969eb9d7d0c2c53adae7b3e63dbftree
parent6e802db3c418e522b25a16fd74ea6d98fc2a1480commit | diff
target/arm: Enable FPSCR.QC bit for MVE

MVE has an FPSCR.QC bit similar to the A-profile Neon one; when MVE
is implemented make the bit writeable, both in the generic "load and
store FPSCR" helper functions and in the code for handling the NZCVQC
sysreg which we had previously left as "TODO when we implement MVE".

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210614151007.4545-3-peter.maydell@linaro.org
target/arm/translate-vfp.c diff | blob | history
target/arm/vfp_helper.c diff | blob | history
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